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Author Topic: BTCMiner - Open Source Bitcoin Miner for ZTEX FPGA Boards, 215 MH/s on LX150  (Read 153856 times)
trilby
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November 04, 2011, 07:07:04 PM
 #81

Is there a way to setup a way to setup a backup pool with BTCMiner?

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ztex
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November 04, 2011, 07:55:22 PM
 #82

Is there a way to setup a way to setup a backup pool with BTCMiner?

No. I will add this to the todo list.

trilby
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November 04, 2011, 08:13:03 PM
 #83

Is there a way to setup a way to setup a backup pool with BTCMiner?

No. I will add this to the todo list.

Well other than not having a backup pool option it is a great product with very reliable software.

Have I helped you send me a donation - 1LaZmd9ZzpmjA4gkXxiQPsmfQ8zSc5mTZo
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November 05, 2011, 05:42:02 PM
 #84

A new BTCMiner release has been published at http://www.ztex.de/btcminer. With the new design typically about 190 MH/s can be achieved
on USB-FPGA Modules 1.15x (192 MHz at an error rate of less than 1%)

The data in the initial post has been updated.

Since the USB-FPGA Modules 1.15x are available now, I created a separate thread in the mining hardware section: https://bitcointalk.org/index.php?topic=49180.0 This post also contains volume prices and estimated prices for license production programs.


  Very awesome on the 190 achievment.  Is that primarily a chip limitation or is it possible to get any higher with good cooling and highly 'clean' power?  I.e., 88% PSUs, voltage regulation, and commercial grade ventilation?

If you're not excited by the idea of being an early adopter 'now', then you should come back in three or four years and either tell us "Told you it'd never work!" or join what should, by then, be a much more stable and easier-to-use system. - GA
It is being worked on by smart people. -DamienBlack
rph
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November 06, 2011, 01:12:16 AM
 #85

Stupid question: doesn't this double the number of registers you need?

[Following up 1 month late..]

Using 2 cycles per stage does increase the number of registers, but nowhere near 2X. Multiple registers can be
packed very efficiently into SRL16s. So turning a 4 cycle delay into an 8 cycle delay has almost no marginal
area or power cost; they both use 1 SRL16.

-rph

Ultra-Low-Cost DIY FPGA Miner: https://bitcointalk.org/index.php?topic=44891
ztex
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November 06, 2011, 01:59:35 PM
 #86

Very awesome on the 190 achievment.  Is that primarily a chip limitation or is it possible to get any higher with good cooling and highly 'clean' power?  I.e., 88% PSUs, voltage regulation, and commercial grade ventilation?

It's a limitation of the bitstream (i.e the implemented design) and the FPGA.

'Clean power' does not help since core voltage quality is defined by the on board regulators, not he external voltage.

Standard cooling (with heatsink and fan) is more than sufficient.

The only thing that may help is to 'overvolt' the FPGA from (e.g. from 1.23V to 1.26V) by replacing one resistor.



ngzhang
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November 06, 2011, 03:16:33 PM
 #87

Very awesome on the 190 achievment.  Is that primarily a chip limitation or is it possible to get any higher with good cooling and highly 'clean' power?  I.e., 88% PSUs, voltage regulation, and commercial grade ventilation?

It's a limitation of the bitstream (i.e the implemented design) and the FPGA.

'Clean power' does not help since core voltage quality is defined by the on board regulators, not he external voltage.

Standard cooling (with heatsink and fan) is more than sufficient.

The only thing that may help is to 'overvolt' the FPGA from (e.g. from 1.23V to 1.26V) by replacing one resistor.




Whould you mind using your arithmetic on other venders development board? certainly follow the GNU license.

CEO of Canaan-creative, Founder of Avalon project.
https://canaan.io/
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sadpandatech
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November 06, 2011, 06:21:06 PM
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Very awesome on the 190 achievment.  Is that primarily a chip limitation or is it possible to get any higher with good cooling and highly 'clean' power?  I.e., 88% PSUs, voltage regulation, and commercial grade ventilation?

It's a limitation of the bitstream (i.e the implemented design) and the FPGA.

'Clean power' does not help since core voltage quality is defined by the on board regulators, not he external voltage.

Standard cooling (with heatsink and fan) is more than sufficient.

The only thing that may help is to 'overvolt' the FPGA from (e.g. from 1.23V to 1.26V) by replacing one resistor.


  Thank you very much for the response.  Is there any chance we can sweet talk you into dropping a 1.26v resistor onto one to see the results? =)

  Btw, I assume the heatsinks are not inculded.? Where did you get yours and are they cost effective if buying 100+ of them?

If you're not excited by the idea of being an early adopter 'now', then you should come back in three or four years and either tell us "Told you it'd never work!" or join what should, by then, be a much more stable and easier-to-use system. - GA
It is being worked on by smart people. -DamienBlack
ztex
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November 06, 2011, 08:57:48 PM
 #89

Whould you mind using your arithmetic on other venders development board? certainly follow the GNU license.

Why should I do this?

ztex
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November 06, 2011, 09:04:45 PM
 #90

Is there any chance we can sweet talk you into dropping a 1.26v resistor onto one to see the results? =)
I'll try this out next week.

Quote
Btw, I assume the heatsinks are not inculded.? Where did you get yours and are they cost effective if buying 100+ of them?

A heat sink with fan is included, see http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html#hs

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November 06, 2011, 09:07:52 PM
 #91

Would you mind using your arithmetic on other venders development board? certainly follow the GNU license.

Why should I do this?

I mean: "Would you mind if somebody using your arithmetic on other venders development board? certainly follow the GNU license. "

CEO of Canaan-creative, Founder of Avalon project.
https://canaan.io/
Business contact: love@canaan.io
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sadpandatech
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November 06, 2011, 09:37:10 PM
 #92

Is there any chance we can sweet talk you into dropping a 1.26v resistor onto one to see the results? =)
I'll try this out next week.
  Very awesome, thank you.
Btw, I assume the heatsinks are not inculded.? Where did you get yours and are they cost effective if buying 100+ of them?
A heat sink with fan is included, see http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html#hs

  Ahh, my poor comprehension skills. Some of the verbage threw me off I believe. 'belongs to the content of delivery', it makes sense now. Should possibly read, "is included content with delivery of fpga"

  Would there be any cost savings to order them with just the heatsink and no fan?  Or is the cost so negligible it doesn't really matter?   Thanks again for your replies, m8

     Cheers,
         Derek

If you're not excited by the idea of being an early adopter 'now', then you should come back in three or four years and either tell us "Told you it'd never work!" or join what should, by then, be a much more stable and easier-to-use system. - GA
It is being worked on by smart people. -DamienBlack
ztex
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November 06, 2011, 09:51:56 PM
 #93

I mean: "Would you mind if somebody using your arithmetic on other venders development board? certainly follow the GNU license. "

It's Open Source, i.e. everyone is allowed to port this software / core to other boards. The only limitation is that is has to be published under GPL, if it is distributed in some way.

ztex
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November 06, 2011, 09:59:03 PM
 #94

Would there be any cost savings to order them with just the heatsink and no fan?  Or is the cost so negligible it doesn't really matter?   Thanks again for your replies, m8

The fan belongs to the heat sink and is installed on it. AFAIR heat sink with fan costs $4-$5, i.e. there is not much potential for saving costs.

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November 06, 2011, 10:14:21 PM
 #95

Would there be any cost savings to order them with just the heatsink and no fan?  Or is the cost so negligible it doesn't really matter?   Thanks again for your replies, m8

The fan belongs to the heat sink and is installed on it. AFAIR heat sink with fan costs $4-$5, i.e. there is not much potential for saving costs.

  Thank you so much again for the quick response.  Yea, minimal cost for sure. Do you know what the CFM, voltage and amperage are for those fans?

If you're not excited by the idea of being an early adopter 'now', then you should come back in three or four years and either tell us "Told you it'd never work!" or join what should, by then, be a much more stable and easier-to-use system. - GA
It is being worked on by smart people. -DamienBlack
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November 06, 2011, 10:16:32 PM
 #96

I mean: "Would you mind if somebody using your arithmetic on other venders development board? certainly follow the GNU license. "

It's Open Source, i.e. everyone is allowed to port this software / core to other boards. The only limitation is that is has to be published under GPL, if it is distributed in some way.

I got a question about that.  Does GPL protect your IP from a "covert distro".  Meaning someone take your code, tweaks it to get 3% more performance and then sells FGPA already loaded with it.  They still have to release the source code of their improvements right?
greenlander
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November 07, 2011, 03:43:19 AM
 #97

ztex,

I bought your 1.15d card and the power supply module on the internet a couple of months ago.  I was trying to get my own bitcoin miner working, but had some problems since my hardware background isn't quite good enough.  (I write linux software drivers for Android for a living, so I have good low-level software experience but not much experience with Verilog.)  However, I downloaded your design and it is working great.  I'm getting about 150-160 MH/s out of the Spartan6 LX150.

The obvious problem is that it gets too hot.  When I first power it on it can do about 190 MHz, but as it heats up it starts dropping frequency until it gets down to 168 MHz.  The passive heatsink you supply just isn't enough for this application. It's super-hot to the touch.  Can you recommend a fansink that will work well with the 1.15d board to keep it cooler?

Thanks.
ztex
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November 07, 2011, 08:43:34 AM
 #98

I bought your 1.15d card and the power supply module on the internet a couple of months ago.  I was trying to get my own bitcoin miner working, but had some problems since my hardware background isn't quite good enough.  (I write linux software drivers for Android for a living, so I have good low-level software experience but not much experience with Verilog.)  However, I downloaded your design and it is working great.  I'm getting about 150-160 MH/s out of the Spartan6 LX150.

The obvious problem is that it gets too hot.  When I first power it on it can do about 190 MHz, but as it heats up it starts dropping frequency until it gets down to 168 MHz.  The passive heatsink you supply just isn't enough for this application. It's super-hot to the touch.  Can you recommend a fansink that will work well with the 1.15d board to keep it cooler?

1.15d module has just a 25mm heat sink. As stated on the BTCMiner page this variant requires some airflow, e.g. from a fan positioned near the FPGA Board or using Active cooling upgrade for USB-FPGA Module 1.15d.

ztex
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November 07, 2011, 08:48:25 AM
 #99

Thank you so much again for the quick response.  Yea, minimal cost for sure. Do you know what the CFM, voltage and amperage are for those fans?

6.97 CFM
7 to 13.2V
0.06A @ 12V

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November 07, 2011, 08:59:35 AM
 #100

I got a question about that.  Does GPL protect your IP from a "covert distro".  Meaning someone take your code, tweaks it to get 3% more performance and then sells FGPA already loaded with it.  They still have to release the source code of their improvements right?

Bitstream cannot be stored permanently in the FPGA, i.e. Bitstream is uploaded by the software during the start-up.

But besides of that, source code has also be released if firmware or bitstream is 'hidden in hardware'.

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