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Author Topic: Algorithmically placed FPGA miner: 255MH/s/chip, supports all known boards  (Read 109508 times)
Inspector 2211
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June 08, 2012, 10:17:44 PM
 #421

edit; the other thing to bear in mind is that ASIC will not be the 600%~(math check needed) increase in efficiency that cpu to gpu was.

Agreed.
It could be much more than that.
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sadpandatech
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June 08, 2012, 10:24:31 PM
 #422

edit; the other thing to bear in mind is that ASIC will not be the 600%~(math check needed) increase in efficiency that cpu to gpu was.

Agreed.
It could be much more than that.

much more than that over FPGA? I'm very limited in my knowledge on the matter but I just don't see it.  Ztex for example is ~40 watts at 860MH(x 4 chips @45nm).  I'd hazard to guess a 65nm or larger(likely 90nm+ in BFL's build) asic is going to be what? 12w+ per chip and 800-1600MH?

If you're not excited by the idea of being an early adopter 'now', then you should come back in three or four years and either tell us "Told you it'd never work!" or join what should, by then, be a much more stable and easier-to-use system. - GA
It is being worked on by smart people. -DamienBlack
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June 08, 2012, 10:33:20 PM
 #423

edit; the other thing to bear in mind is that ASIC will not be the 600%~(math check needed) increase in efficiency that cpu to gpu was.

Agreed.
It could be much more than that.

much more than that over FPGA? I'm very limited in my knowledge on the matter but I just don't see it.  Ztex for example is ~40 watts at 860MH(x 4 chips @45nm).  I'd hazard to guess a 65nm or larger(likely 90nm+ in BFL's build) asic is going to be what? 12w+ per chip and 800-1600MH?

I believe the OpenASIC boys were talking 8gh/s 100w or so...
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June 08, 2012, 10:34:41 PM
 #424

edit; the other thing to bear in mind is that ASIC will not be the 600%~(math check needed) increase in efficiency that cpu to gpu was.

Agreed.
It could be much more than that.

much more than that over FPGA? I'm very limited in my knowledge on the matter but I just don't see it.  Ztex for example is ~40 watts at 860MH(x 4 chips @45nm).  I'd hazard to guess a 65nm or larger(likely 90nm+ in BFL's build) asic is going to be what? 12w+ per chip and 800-1600MH?

12w for 1600MH/s is way too high...


Regards,
BF Labs Inc.

BF Labs Inc.  www.butterflylabs.com   -  Bitcoin Mining Hardware
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June 08, 2012, 10:37:37 PM
 #425

edit; the other thing to bear in mind is that ASIC will not be the 600%~(math check needed) increase in efficiency that cpu to gpu was.

Agreed.
It could be much more than that.

much more than that over FPGA? I'm very limited in my knowledge on the matter but I just don't see it.  Ztex for example is ~40 watts at 860MH(x 4 chips @45nm).  I'd hazard to guess a 65nm or larger(likely 90nm+ in BFL's build) asic is going to be what? 12w+ per chip and 800-1600MH?

12w for 1600MH/s is way too high...


Regards,
BF Labs Inc.

On the watts or mh/s?
swissmate
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June 08, 2012, 10:43:59 PM
 #426

Where have you developed this fpga?
Maybe Logisim?
Also, are you willing to share the scheme of the fpga design?

Bitcoin adress:1HtrosDCEM3zMJ1RbsK9g4vpe3DTotBhVh


Need any translation?
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June 08, 2012, 10:53:34 PM
 #427

edit; the other thing to bear in mind is that ASIC will not be the 600%~(math check needed) increase in efficiency that cpu to gpu was.

Agreed.
It could be much more than that.

much more than that over FPGA? I'm very limited in my knowledge on the matter but I just don't see it.  Ztex for example is ~40 watts at 860MH(x 4 chips @45nm).  I'd hazard to guess a 65nm or larger(likely 90nm+ in BFL's build) asic is going to be what? 12w+ per chip and 800-1600MH?

12w for 1600MH/s is way too high...


Regards,
BF Labs Inc.

On the watts or mh/s?

Did you expect a clear answer?

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June 08, 2012, 11:02:47 PM
 #428

edit; the other thing to bear in mind is that ASIC will not be the 600%~(math check needed) increase in efficiency that cpu to gpu was.

Agreed.
It could be much more than that.

much more than that over FPGA? I'm very limited in my knowledge on the matter but I just don't see it.  Ztex for example is ~40 watts at 860MH(x 4 chips @45nm).  I'd hazard to guess a 65nm or larger(likely 90nm+ in BFL's build) asic is going to be what? 12w+ per chip and 800-1600MH?

12w for 1600MH/s is way too high...


Regards,
BF Labs Inc.

On the watts or mh/s?

Did you expect a clear answer?

Not particularly since it is BFL involved in the question but you never know until you ask, who knows they just might break past habits for once...
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June 09, 2012, 12:48:37 AM
 #429

I can't understand the harsh criticism from people here on him / his concept.
It's actually simply perfect for everyone involved.


I really wonder what it is you perceive as being harsh criticism.

Mining on CPU or GPU was a hobby activity.  I've got this gear for other purposes, so why not harvest a few bitcoins as well?

Buying purpose built FPGAs is a business.  What I posted was my analysis of the business proposition ET made.  It's a non-starter for me for the reasons I shared.  I posted in the hope of learning where my analysis was incorrect, or possibly influencing ET to choose a compensation model that I could participate in.  So far, no luck on either, but it appears that he hasn't read, or digested my feedback yet, so I will hold back on my input on what might make a workable model.

I also wonder what was so vexing to you that it lead to your only substantial post ever on this board.
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June 09, 2012, 02:25:10 AM
 #430

What makes you think I meant (only) you? (and only this thread?)

Some people accused him of greed, some said that the community should (must) get it for free because bitcoin is "free".
Some even think that they know better ways to protect his IP or compensate him for his work.
Seriously, you can't expect something for free that you use to make (more) money with.

And finally - actually it's free (or will be) - the only catch is the 20% that he collects from the additional performance...
There is no payment upfront needed - everyone can simply try it - and in case they are not satisfied switch back to their regular bitstream. Nobody is forced to use Elden's bitstream. Don't like it? Don't use it!
(I am positive that there will be an alternative sooner or later)

I was watching Elden's work from the very start and was very curious to see what he is going to do regarding protection / compensating himself for his work. And the concept he brought up is (from my point of view) very fair. Life is full of risks, if the power grid or the network connection is down for 12h - who will compensate you for your mining loss ? the electric company / the provider ?

Bitcoin mining seems to be the new gold rush. It's a capitalistic system which rewards early adopters which are willing to risk time, money and effort. (Sounds pretty much like most "businesses"...)

I admire people that create or work on open source software or hardware and make it available to the public.
But it's important to see also the other guys with commercial interests that bring things forward, create competition and innovations.

Anyway - only my point of view, if anyone feels offended - she/he shouldn't.

Phil
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June 09, 2012, 03:35:26 AM
 #431

Upon reverse engineering this 8-stage decryption algorithm, one could then pre-encrypt the pool vectors in software

You might find that a bit difficult to do without the private key. Wink

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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June 09, 2012, 03:37:42 AM
 #432

I have strong opinion against TCP for such purposes

One reason I used TCP was compatibility with Tor.  You can't do UDP over Tor (except DNS which is a special case).

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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June 09, 2012, 03:41:36 AM
 #433

I would like to trust that ET is an honorable person and would never do such a thing.  But his entire scheme is based upon the premise that I would steal his IP.  So I can't assume that he would not steal from me.

Actually, the way I understood his plans, it will be technically impossible for him to do anything of that kind secretly.... But even if they did, it would be easy to tell if a share "disappears" inside of the signcryption server.

This is correct.

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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June 09, 2012, 03:42:51 AM
 #434

If his server is down you don't hash.

No.  If my server is down you don't hash with the TML.  You go back to your old bitstream.  You lose a small amount of income and I lose all of my income.  Sounds to me like my incentives are pretty well-aligned.

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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June 09, 2012, 03:45:22 AM
 #435

Quote from: Entropy-uc

Yes, I got one person so far, yourself.

So, who are you really?  Looks like you created a special account to come and espouse your particular point of view.

Busted!

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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June 09, 2012, 03:50:53 AM
 #436

The FPGA contains 3 sha256's and as I have stated before, this poses the problem that you cannot have different versions of those 64 rounds without restricting which can be used at certain times during the processing which then would mean a reduction in the MH/s With 3 sha256's you have the problem of which one is available next - thus all 3 must be the same or you will have times when a specific sha256 isn't available (or there is no data for that sha256) and have to wait. (i.e. the reason why I said that his double sha256 is 8 stages longer than an optimised double sha256)

I'm not sure I follow here, but each of the three rings is completely independent of the other two.  That's why I'm able to give each one its own separately-adjustible clock.  They don't talk to each other at all.  Each one gets its own piece of work.

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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June 09, 2012, 04:12:36 AM
 #437

3. At 12V input voltage it is probably possible to override the max. current of AOZ1025DI by 0.5A (this would require some long term tests at 9.5A).

This concern is valid.  The ztek boards do not supply enough power. This is why I have been encouraging designers to budget for more than 8A.



4. I'm concerned about the reliability (due to the 2-year warranty):
...
K/w for the thermal grease leads to a junction temperature of 85°C at 8A

This is misleading; you are fretting about device damage but basing your calculations on the error-free-operation parameters instead of the device-damage parameters.

Xilinx guarantees their chips can tolerate operating junction temperatures up to 125°C (see page 2 of DS162) without damage, for all temperature grades (they're manufactured identically, then sorted by testing).  Using your thermal constants, this means that a CSG484 can handle 26A of current (!) and an FGG484 can handle 20A of current without being damaged (though, of course, the error rate will be 100%).  Anyways, that's plenty of current, even for bitfury.

For each temperature grade Xilinx publishes another, lower, limit above which they will not guarantee perfectly error-free operation (85°C for the C-grade devices).  People using FPGAs for bitcoin mining are already far beyond the "guaranteed perfectly error-free" region on other axes like clock frequency.

According to Austin Lessea (of comp.arch.fpga fame; a Principal Engineer at Xilinx) "the device is incredibly robust as far as junction temperature is concerned, and it would have to be at 125C and hotter for a long period to cause damage."


(Of course, everyone can do this on ones own risk.)

The 8A power supply on your board will go into overcurrent or thermal shutdown long before the FPGA is able to damage itself by self-heating.

To avert any possible FUD I'll put my money where my mouth is: 100 BTC bounty to anybody who sends me source code for a bitstream that causes permanent heat damage to my ztek board, with heatsink installed and fan running.  No unusual I/O pin usage allowed, and the design has to pass Xilinx DRC.  If you think there's a risk step right up and claim the bounty!

Edit: created a separate thread for the bounty.

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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June 09, 2012, 04:15:34 AM
 #438

Update: I am (still) dotting I's an crossing T's.  But getting very close.

The first bitstream posted will be for ztex boards using a jtag cable (not the Cypress USB thing).  Any jtag cable supported by urjtag will work.  It will also be only a 230MH/s design: if I set the clock period to 155mhz I can actually get the builds to finish in a reasonable amount of time, so that's what I've been doing for the last day or two.  I'll set the commission to 0.01% to compensate.

(Edit, 17-Jun, jtag cable will not be required for ztex boards)

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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June 09, 2012, 04:31:37 AM
 #439

Update: I am (still) dotting I's an crossing T's.  But getting very close.

The first bitstream posted will be for ztex boards using a jtag cable (not the Cypress USB thing).  Any jtag cable supported by urjtag will work.  It will also be only a 230MH/s design: if I set the clock period to 155mhz I can actually get the builds to finish in a reasonable amount of time, so that's what I've been doing for the last day or two.  I'll set the commission to 0.01% to compensate.

awesome updates, m8. Has anyone submitted the neccesary enterpoint info and/or sent you a unit to test your bitstream on theirs?

If not, any plans to work on an enterpoint stream?

If you're not excited by the idea of being an early adopter 'now', then you should come back in three or four years and either tell us "Told you it'd never work!" or join what should, by then, be a much more stable and easier-to-use system. - GA
It is being worked on by smart people. -DamienBlack
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June 09, 2012, 02:51:16 PM
 #440

If his server is down you don't hash.

No.  If my server is down you don't hash with the TML.  You go back to your old bitstream.  You lose a small amount of income and I lose all of my income.  Sounds to me like my incentives are pretty well-aligned.

When you submit free patches to all the major mining software packages to support automatic failover to backup bitstreams I will agree with you.

As of today, such a bitstream change would have to be manually handled.  The time to detect the failure and changeover could easily cause miners to lose money in comparison to not using your system at all.  So incentives are not aligned.  Your customers can lose money.  You only risk not collecting commissions.
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