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Author Topic: Algorithmically placed FPGA miner: 255MH/s/chip, supports all known boards  (Read 109643 times)
Nachtwind
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July 21, 2012, 11:22:04 AM
 #661

Is anyone using that bitstream on Ztex Singles? Would like to know if it is somehow usable
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kakobrekla
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July 21, 2012, 11:23:22 AM
 #662

Is anyone using that bitstream on Ztex Singles? Would like to know if it is somehow usable

H:357/114,114,128 X:272 C:180,180,185 E:0/0,0,0 T:5m

personal best, so far at least.

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July 21, 2012, 12:31:58 PM
 #663

Is anyone using that bitstream on Ztex Singles? Would like to know if it is somehow usable

H:357/114,114,128 X:272 C:180,180,185 E:0/0,0,0 T:5m

personal best, so far at least.

You have all my envy Smiley

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July 21, 2012, 03:09:23 PM
 #664

Is anyone using that bitstream on Ztex Singles? Would like to know if it is somehow usable

H:357/114,114,128 X:272 C:180,180,185 E:0/0,0,0 T:5m

personal best, so far at least.

You have all my envy Smiley

spiccioli

I must not understand that block of code.

I was thinking T:5m meant it ran for 5 minutes before failing.

It ran stable, the T is the timeframe for the Error rates (which were 0).
I should add, its a modified ztex single board.

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July 22, 2012, 09:19:24 AM
 #665

"cafe babe" - wow.
Much better than
"dead beef", I think.

Yeah, I also think it beats the crass 0xB16B00B5 that Microsoft got in trouble for.

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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July 22, 2012, 09:20:18 AM
 #666

H:357/114,114,128 X:272 C:180,180,185 E:0/0,0,0 T:5m

http://www.tricone-mining.com/images/overvolted-283mhps-dont-try-this-at-home-kids.png

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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July 22, 2012, 09:22:55 AM
 #667

eldentyrell,
if you look at this message
https://bitcointalk.org/index.php?topic=49971.msg1042538#msg1042538
and/or at messages 655/656 in this thread you'll see that the value is 0xcafebabe before and after.


Right.  The fact that the IDCODE is corrupted only sometimes -- and not other times -- is why I am dead-certain there are signal integrity issues here.

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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July 22, 2012, 09:23:46 AM
 #668

I have 10 boards and i don't think every board is broken

Well, I can guarantee you that something is very, very broken with your JTAG connection.

It could be a board design flaw (ringing TCK is a very common problem), in which case you would expect it to appear on all 10 boards.  It could be that your JTAG cable is defective (unlikely, but this too would explain the problem).  It could be that something is quirky with the software driver for your JTAG cable.  It could be that you're running the JTAG clock too fast (you tried -Durjtag_tck_freq=10000, right?).

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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July 22, 2012, 11:16:03 AM
 #669


Bah, now I have work to do again.  Grin

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July 22, 2012, 10:16:03 PM
 #670

Code:
c:\ztex>java -Xbootclasspath/a:ZtexBTCMiner-120221.jar -jar tml-1.0.jar ztex:0 "
http://Nachtwind_fpga:yepiuseone@de.btcguild.com:8332"

_________________________________________________________________________
Tricone Mining Logic, host software v1.0

   IF YOU EXPERIENCE HIGH ERROR RATES: try running just one ring at a
   time (e.g. use 'ztex:0:0.0' on command line instead of 'ztex:0').
   If each ring works error free on its own, but you get errors when
   running all three, it means your power supply is sagging.

             adding work source btcguild.com
             starting long poll thread
[0              ] ←[35mfound new board ztex:0←[0m
[ztex:0         ] ←[35mfound new chip←[0m
[ztex:0         ] programming FPGA
H:←[1m←[32m0←[0m←[0m X:0 E:←[1m←[31m0←[0m←[0m T:5.7s   |  H:←[1m←[32m0←[0m←[0m E
[ztex:0         ]   done programming FPGA      :5.7s
H:←[1m←[32m0←[0m←[0m X:0 E:←[1m←[31m0←[0m←[0m T:5.7s   |  H:←[1m←[32m0←[0m←[0m E
:←[1m←[31m0←[0m←[0m A:←[32m0←[0m R:←[33m0←[0m T:5.7s java.io.IOException: java.l
ang.RuntimeException: Error sending data, ztex error -22, libusbjava says libusb
0-dll:err [submit_async] invalid interface -1

        at com.triconemining.board.Ztex$ZtexChip.flush(Ztex.java:209)
        at com.triconemining.board.Ztex$ZtexChip.scan(Ztex.java:168)
        at com.triconemining.board.MiningChip.read(MiningChip.java:52)
        at com.triconemining.miner.ChipWrapper.checkMagicNumber(ChipWrapper.java
:293)
        at com.triconemining.miner.ChipWrapper.<init>(ChipWrapper.java:54)
        at com.triconemining.miner.BoardWrapper.getChip(BoardWrapper.java:49)
        at com.triconemining.miner.BoardWrapper.run_(BoardWrapper.java:101)
        at com.triconemining.miner.BoardWrapper.run(BoardWrapper.java:73)
        at java.lang.Thread.run(Unknown Source)
Caused by: java.lang.RuntimeException: Error sending data, ztex error -22, libus
bjava says libusb0-dll:err [submit_async] invalid interface -1

        at com.triconemining.board.Ztex$ZtexChip.flush(Ztex.java:193)
        ... 8 more
H:←[1m←[32m0←[0m←[0m X:0 E:←[1m←[31m0←[0m←[0m T:10s   | 
H:←[1m←[32m0←[0m←[0m E:...

Been trying to get the code running on my ztex singe - but the above happens.
From that point onward T:[nn]s just moves on till i kill it (about 5min later)...

ANy ideas what might be wrong here?
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July 25, 2012, 09:29:45 AM
 #671


java.io.IOException: java.lang.RuntimeException: Error sending data, ztex error -22, libusbjava says libusb
0-dll:err [submit_async] invalid interface -1


Any ideas what might be wrong here?

Unfortunately in order to communicate with the ztex board over its proprietary USB interface, we have to rely on ztex's USB code.  It is really, really buggy.  I have quite a bit of evidence now that he seems to have debugged it just barely enough to make his miner work -- but left all sorts of other bugs.  Mostly they seem to show up on windows.  One suggestion is to try using Linux or MacOS for the mining host.

However, a more effective solution is to ditch the proprietary USB interface and use the industry-standard IEEE JTAG protocol.  The Altera USB Blaster is very well-supported by urjtag and you can find them $9 on ebay (including shipping!):

  http://www.ebay.com/sch/i.html?_nkw=altera+usb+blaster

The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators.  So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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July 25, 2012, 10:11:13 AM
 #672

However, a more effective solution is to ditch the proprietary USB interface and use the industry-standard IEEE JTAG protocol.  The Altera USB Blaster is very well-supported by urjtag and you can find them $9 on ebay (including shipping!):
Would this also work for the Enterpoint-Board?

Review of the Spondoolies-Tech SP10 „Dawson“ Bitcoin miner (1.4 TH/s)

[22:35] <Vinnie_win> Did anyone get paid yet? | [22:36] <Isokivi> pirate did!
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July 25, 2012, 12:32:53 PM
 #673

However, a more effective solution is to ditch the proprietary USB interface and use the industry-standard IEEE JTAG protocol.  The Altera USB Blaster is very well-supported by urjtag and you can find them $9 on ebay (including shipping!):
Would this also work for the Enterpoint-Board?

Yep.  And I'm currently working on using the onboard FTDI chip for exactly this process.  The code is improving and I hope to have it stable in around a week, but we will see!
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July 25, 2012, 07:59:45 PM
 #674

Nachtwind: I reproduced your error on Win7 64 box. We tried a few tricks with jfsebastien but so far nothing.

VM might be one solution here.

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July 25, 2012, 08:04:10 PM
 #675


java.io.IOException: java.lang.RuntimeException: Error sending data, ztex error -22, libusbjava says libusb
0-dll:err [submit_async] invalid interface -1


Any ideas what might be wrong here?

Unfortunately in order to communicate with the ztex board over its proprietary USB interface, we have to rely on ztex's USB code.  It is really, really buggy.  I have quite a bit of evidence now that he seems to have debugged it just barely enough to make his miner work -- but left all sorts of other bugs.  Mostly they seem to show up on windows.  One suggestion is to try using Linux or MacOS for the mining host.

However, a more effective solution is to ditch the proprietary USB interface and use the industry-standard IEEE JTAG protocol.  The Altera USB Blaster is very well-supported by urjtag and you can find them $9 on ebay (including shipping!):

  http://www.ebay.com/sch/i.html?_nkw=altera+usb+blaster

How am I supposed to run a cluster over JTAG?

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July 26, 2012, 01:47:33 AM
 #676

With lots and lots of $9 JTAG cables.   Roll Eyes
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July 26, 2012, 03:19:07 AM
 #677

@Elden
Is it possible to cascade multiple FPGA's in a cluster using a single UrJtag compatible Interface ?

@kakobrekla
"I should add, its a modified ztex single board."
In which way was that board modified? Does it still use the same DC/DC setup for the core voltage of the XC6 ?

Regards

Phil

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July 26, 2012, 06:20:45 AM
 #678

@kakobrekla
"I should add, its a modified ztex single board."
In which way was that board modified? Does it still use the same DC/DC setup for the core voltage of the XC6 ?

https://bitcointalk.org/index.php?topic=90370

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July 26, 2012, 06:44:34 AM
 #679

thanks Punin, so actually it's just overvolted  Cool

The DC/DC for the core voltage on the boards from ZTEX are built for a max. continues current of around 8A

@kakobrekla
Did you ever measure the current drawn while running the ET bitstream on the speeds mentioned by you?
Even a simple measurement on the 12V input can help us to roughly figure it out. Would really appreciate that Smiley

Phil
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July 26, 2012, 07:03:49 AM
 #680

With lots and lots of $9 JTAG cables.   Roll Eyes

Inspector,

do you need some kind of jtag hub? I mean, on one side we have the jtag connector, but on the other side?

spiccioli
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