HashFast launches sales of the Baby Jet

[jspielberg]

I would then assume you are just as skeptical of the other 28nm projects out there as well (KnC, Cointerra, etc.)?

I think comparing a general purpose CPU and a bag of logic that does a bunch of right rotates, AND, XORs, and appends is a bit disingenuous.
http://en.wikipedia.org/wiki/SHA-2#Pseudocode

The fact that Bitfury was able to produce a 55nm that hashes must be a freakin' miracle.

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[tacotime]

I would then assume you are just as skeptical of the other 28nm projects out there as well (KnC, Cointerra, etc.)?

I think comparing a general purpose CPU and a bag of logic that does a bunch of right rotates, AND, XORs, and appends is a bit disingenuous.
http://en.wikipedia.org/wiki/SHA-2#Pseudocode

The fact that Bitfury was able to produce a 55nm that hashes must be a freakin' miracle.

I'm not really skeptical, as almost 1/3 of what TSMC ships out right now is on 28 nm.  Which is, I believe, about the same quantity as on 55/65 nm at the current time.  But I would be surprised if the ease and cost of developing at 28 nm were the same as for 55 nm.  You should also keep in mind that Penryn was a die shrink of the Core 2 microarchitecture, so there was really not a lot new going on there (probably why the first tape-out was so dramatically successful).



What may really kill these chips in terms of development time is that they've selected pretty big die areas for them.  At 324 mm^2, HashFast will have a huge problem if they don't meet thermal specs at 250 W as they'll be next to impossible to cool or will not meet specified hash rates.  This was the same problem AMD hit early on with their Bulldozer processors, and the Bulldozer series of processors were slightly smaller than this.  I would say that anyone who is claiming a 324 mm^2 chip with a target TDP of 250 W can be easily overclocked 25% should be considered suspicious.

[Ytterbium]

I would then assume you are just as skeptical of the other 28nm projects out there as well (KnC, Cointerra, etc.)?

I think comparing a general purpose CPU and a bag of logic that does a bunch of right rotates, AND, XORs, and appends is a bit disingenuous.
http://en.wikipedia.org/wiki/SHA-2#Pseudocode

The fact that Bitfury was able to produce a 55nm that hashes must be a freakin' miracle.

A general purpose CPU can be quite simple. The 6502 (the one that powered the Apple-2, and the NES) had about 3,000 transistors  However, something like a modern X86 chip is a beast, with hundreds of millions of transistors that all need to work perfectly and in sync.

[iCEBREAKER]

I would then assume you are just as skeptical of the other 28nm projects out there as well (KnC, Cointerra, etc.)?

I think comparing a general purpose CPU and a bag of logic that does a bunch of right rotates, AND, XORs, and appends is a bit disingenuous.
http://en.wikipedia.org/wiki/SHA-2#Pseudocode

The fact that Bitfury was able to produce a 55nm that hashes must be a freakin' miracle.

I'm not really skeptical, as almost 1/3 of what TSMC ships out right now is on 28 nm.  Which is, I believe, about the same quantity as on 55/65 nm at the current time.  But I would be surprised if the ease and cost of developing at 28 nm were the same as for 55 nm.  You should also keep in mind that Penryn was a die shrink of the Core 2 microarchitecture, so there was really not a lot new going on there (probably why the first tape-out was so dramatically successful).



What may really kill these chips in terms of development time is that they've selected pretty big die areas for them.  At 324 mm^2, HashFast will have a huge problem if they don't meet thermal specs at 250 W as they'll be next to impossible to cool or will not meet specified hash rates.  This was the same problem AMD hit early on with their Bulldozer processors, and the Bulldozer series of processors were slightly smaller than this.  I would say that anyone who is claiming a 324 mm^2 chip with a target TDP of 250 W can be easily overclocked 25% should be considered suspicious.

hi TT, always nice to see you around!

That chart is from 2009, back in the dark ages Before Satoshi.  28nm silicon is cheap and easy now.

Inherently vastly redundant much like a GPU, the GN is much less complex (logically and physically) than modern CPUs like Bulldozer and Core2.   Such redundancy vastly increases margin for error as faulty registers/hashing units are simply disabled.  Sync issues are also trivial due to the perfectly parallel nature of hashing and low clock speeds.

One advanced feature confirmed for GN is on-die thermal management.  While not exactly Powertune (sorry that IP isn't for sale ) the function is equivalent - chip gets hot, chip slows down until it cools off.

IDK exactly how huge/hungry my 7970s are, but they definitely run well over 125% with stock cooling and Powertune +20.

Given their sweet performance-enthusiast-sourced aftermarket liquid-cooling, HashFasts will crush. 

[DeathAndTaxes]

At 324 mm^2, HashFast will have a huge problem if they don't meet thermal specs at 250 W as they'll be next to impossible to cool or will not meet specified hash rates.  This was the same problem AMD hit early on with their Bulldozer processors, and the Bulldozer series of processors were slightly smaller than this.  I would say that anyone who is claiming a 324 mm^2 chip with a target TDP of 250 W can be easily overclocked 25% should be considered suspicious.

Not really.  It is all relative.  Say for the sake of the argument they can't exceed 250W (not sure what is true with water cooling and large die size).  Lets also say 400 GH/s is over 250W.  There is some clock speed and voltage combination which produces X GH/s stable at 250W TDP.  Now lets take that a step further.  What makes you think 250W is the target?  Maybe they are targeting 450 GH/s @ 200W and the rest is just to hedge their bets in the final silicon comes in hotter or slower than expected. 

Worse case scenario they end up needing to use multiple chips and/or offer customers a partial refund (which may be cheaper than providing multiple units if they miss by less than a certain percentage).  With the markup on BOM being >500% that simply means less profit, not a loss of profit.

[DeathAndTaxes]

Looking forward to seeing how quickly the GN chips go through spins.  To give everyone else here a sense of time, Intel's 45 nm Penryn 5500s did their first tape-out and wafer generation in the beginning of January 2007.  The initial chips were able to boot Windows (almost unheard of luck for a first tapeout), but the Q9550 chips had many spins and revisions and were not released until November 2007.  However, TSMC has been making solid progress on 28 nm yield for the past while, and I'd expect it'd be through spins in less than a year since it's no longer a bleeding edge process.

This is like comparing a rowboat to a super tanker in terms of complexity.  Bitcoin ASICs are little more than parallel SHA-2 calculators.  There is essentially no logic in the chips, all the smarts are in the general purpose microprocessor running the mining software.

[Simon Barber]

What are the die size, package type, core voltage, transistor count, operating frequency, and projected TDP of the chip?  

The package is a BGA, containing a multi chip module. There are 4 dies, each 9mm x 9mm, spaced out by 5mm. The core voltage and frequency vary according to the cooling available to the chip. The chip contains a temperature sensor on die, and increases or decreases the operating voltage and frequency to maintain a target operating temperature at the die. The allows the maximum possible performance to be achieved, given the cooling that is available. In a colder environment the chip will operate at a slightly higher voltage and frequency, and return a higher hash rate than in a warm environment. Simulation runs show that the best silicon will have a TDP of 250W when operating at the name plate (nominal) 400GH/s. Worst case silicon will consume a few % more power to reach this nominal 400GH/s. Note - simulation results can be out by +/- 20%, although they typically come in high (expect lower numbers in real silicon).

[tacotime]

What are the die size, package type, core voltage, transistor count, operating frequency, and projected TDP of the chip?  

The package is a BGA, containing a multi chip module. There are 4 dies, each 9mm x 9mm, spaced out by 5mm. The core voltage and frequency vary according to the cooling available to the chip. The chip contains a temperature sensor on die, and increases or decreases the operating voltage and frequency to maintain a target operating temperature at the die. The allows the maximum possible performance to be achieved, given the cooling that is available. In a colder environment the chip will operate at a slightly higher voltage and frequency, and return a higher hash rate than in a warm environment. Simulation runs show that the best silicon will have a TDP of 250W when operating at the name plate (nominal) 400GH/s. Worst case silicon will consume a few % more power to reach this nominal 400GH/s. Note - simulation results can be out by +/- 20%, although they typically come in high (expect lower numbers in real silicon).

Are you planning to sell units with lower binning chips for a discount?  I'm guessing they're designed so you can still hash even with a large number of faulty hashing "cores".

When are you guys getting your first wafers back from the fab?

[iCEBREAKER]

Are you planning to sell units with lower binning chips for a discount?  I'm guessing they're designed so you can still hash even with a large number of faulty hashing "cores".

When are you guys getting your first wafers back from the fab?

Hi tacotime, nice to see you on this thread!

I think binning makes more sense for large numbers of chips, but we'll see what yields are and go from there.

First chips should be in-hand by the Nov 1.

[tacotime]

Thanks, good to hear.

[iCEBREAKER]

Baby Jets and Sierras are on sale for the next  three days!

/much rejoicing   

[tacotime]

Baby Jets and Sierras are on sale for the next  three days!

/much rejoicing    

Thanks, bought a sierra

[bobsag3]

We have a rolling GB for these going on thru dylexic and with me hosting (Super cheap), and we are allready halfway paid off one.
https://bitcointalk.org/index.php?topic=299171.0

[dropt]

So does anyone have any information regarding the cost and availability of the 1U control unit?  It appears as though you get a free one if you order 10 Sierras, but there appears to be no mention of such a thing outside of this context.

I hope anyone who's ordered one of this things have done their due diligence in this matter.  If you are one of those purchasers and have already inquired about the cost and availability of the control unit, would you mind sharing the details with the rest of us?

[dropt]

Also, the description claims a back mounted radiator but the render shows them as front mounted (drenching the modules in hot air).  Any clarification from Hashfast as to why the render doesn't match the description, or more importantly, which orientation is the intended design?

[DeathAndTaxes]

Also, the description claims a back mounted radiator but the render shows them as front mounted (drenching the modules in hot air).  Any clarification from Hashfast as to why the render doesn't match the description, or more importantly, which orientation is the intended design?

Not speaking for hashfast but for rackmount servers airflow always has to be front to back without exception.  A datacenter is going to use hot and cold aisles and they aren't going to reverse the flow on an entire row of racks (up to 400 servers) to accommodate a special request.

So either HF would need to put the modules up front or the airflow will be radiator first.  My guess is they have no choice but to have radiator up front because 2U is only 3.5" high that probably means the radiator is no more than ~3" tall.   A 19" case is ~17.5 wide but putting it in the back means losing 4" of width to the PSU.  Not sure a 13" by 3" radiator is up to the task of dumping 750W. 

Still your right the photo seems to directly contradict the description.

[dropt]

First chips should be in-hand by the Nov 1.

I can assume you have inside information then?  How does your expectation of having the first run of chips in-hand at the beginning of November lend to Hashfast's "expected" delivery date of late October.  Further, if the first run of chips is only to be arriving at the beginning of November, how does this effect the second lot of chips arriving in time for a mid-to-late November?

[dropt]

Not speaking for hashfast but for rackmount servers airflow always has to be front to back without exception.  A datacenter is going to use hot and cold aisles and they aren't going to reverse the flow on an entire row of racks (up to 400 servers) to accommodate a special request.

So either HF would need to put the modules up the airflow will be radiator first.  My guess is they have no choice but to have radiator up front because 2U is only 3.5" high that probably means the radiator is no more than ~3" tall.  A 19" case is ~17.5 wide but putting it in the back means losing 4" of width to the PSU.  Not sure a 13" by 3" radiator is up to the task of dumping 750W.

Still your right the photo seems to directly contradict the description..  

That's my understanding (front to back) which makes me assume the text statement of radiators being rear-mounted is the intended design.  However, it then raises the question of why the render shows the radiators mounted in the front.  It would be my guess that the sizing of the radiators would have to accommodate the placement of the PSU, and if the renders are any indication, then they have not accounted for PSU spacing and the radiators will in fact be at the front.  There appears to be two rows of radiators, but I'm not versed enough in liquid cooling to speculate on whether dissipating that volume of heat is feasible given the approximate dimensions of the intended design.

Edit:  Changed to discuss your longer post.

[DeathAndTaxes]

I don't think it is two radiators

It is row of pusher 4 fans  ---> radiator ---> row of 4 puller fans.  Now at this point air pressure is going to be no existent so there are an additional 3 booster fans to increase air velocity over the boards.

Only 1 radiator and 3 rows of fans.   Then again we are looking at a crude schematic so who knows.  It would be good for HF to clarify the intended design.

[gmaxwell]

However, it then raises the question of why the render shows the radiators mounted in the front.

Who says they're at the front? Other than thats where the rack ears are mounted it looks like could go either way.  In a lot of facilities its now preferable to have all the cabling on one side in any case.