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Author Topic: BTCMiner - Open Source Bitcoin Miner for ZTEX FPGA Boards, 215 MH/s on LX150  (Read 161487 times)
ztex (OP)
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May 07, 2012, 10:20:41 AM
 #381

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The effect can be reduced by reducing the number of devices per thread (parameter -n). But the only way to solv this is to choose a faster pool server.

Does reducing the number of devices also help if you're seeing overflows?

Usually yes. This depends on the amount of CPU cores, the size of the cluster and the OS. It's probably not wise to run 200 threads on a single core Atom.


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May 07, 2012, 10:30:46 AM
Last edit: May 07, 2012, 10:45:59 AM by CA Coins
 #382

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The effect can be reduced by reducing the number of devices per thread (parameter -n). But the only way to solv this is to choose a faster pool server.

Does reducing the number of devices also help if you're seeing overflows?

Usually yes. This depends on the amount of CPU cores, the size of the cluster and the OS. It's probably not wise to run 200 threads on a single core Atom.



Thanks, I will give it a try.  Also, not sure if anybody has already mentioned, the block log option is listed as -lb on the help instead of -bl

EDIT:  Just terminated the process remotely with control-c.  When trying to restart, got:
Code:
ztex_ufm1_15y1-2012-L5-A1: New device: bitfile=ztex_ufm1_15y1   f_default=200.00MHz  f_max=240.00MHz  HpC=1.0H
Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high, possible USB transfer errors (INIT_B_HIST=222): Retrying it ...
Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high, possible USB transfer errors (INIT_B_HIST=222): Retrying it ...
Warning: High speed FPGA configuration failed, trying low speed mode:Error uploading bitstream: FPGA configuration failed: DONE pin does not go high, possible USB transfer errors (INIT_B_HIST=222): Trying low speed mode
Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high (size=4220313 ,  0 bytes got lost;  checksum=3 , should be 3;  INIT_B_HIST=222): Retrying it ...
Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high (size=4220313 ,  0 bytes got lost;  checksum=3 , should be 3;  INIT_B_HIST=222): Retrying it ...
I have noticed this before with the quads that went away with a power-cycle.  any thoughts?
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May 07, 2012, 05:42:56 PM
 #383

USB Problem .... I have that too some times.


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May 07, 2012, 08:43:25 PM
Last edit: May 07, 2012, 10:29:54 PM by CA Coins
 #384

Any way to fix this remotely without powering off/on the board?

EDIT:  Did a rescan ~10hrs after the initial failed attempt and the board loaded the firmware without problems.  Maybe it needed to wait until the old firmware is unloaded after a control-c?
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May 08, 2012, 08:00:57 AM
 #385

Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high (size=4220313 ,  0 bytes got lost;  checksum=3 , should be 3;  INIT_B_HIST=222): Retrying

That are no USB errors (checksum is correct and nothing gets lost).

Usually that are power problems, i.e. if the load step after configuration cannot be handled (also see my last email). It is also possible that the core voltage regulator gets to hot. If you use the coolers delivered with the board the heat sinks should orientated (can be rotated by 90°) so that the fans blow at the regulators.

Just a note: Stop the cluster using the 'q' command. This puts the boards in suspend mode. (But this is not the cause of you problem)

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May 08, 2012, 09:03:24 AM
 #386

Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high (size=4220313 ,  0 bytes got lost;  checksum=3 , should be 3;  INIT_B_HIST=222): Retrying

That are no USB errors (checksum is correct and nothing gets lost).

Usually that are power problems, i.e. if the load step after configuration cannot be handled (also see my last email). It is also possible that the core voltage regulator gets to hot. If you use the coolers delivered with the board the heat sinks should orientated (can be rotated by 90°) so that the fans blow at the regulators.

Just a note: Stop the cluster using the 'q' command. This puts the boards in suspend mode. (But this is not the cause of you problem)

It's weird that it was running fine and only happened after I stopped the cluster then tried to restart it.  I have noticed it before with the q command so I stopped using it.  While running, I haven't noticed this problem. 

In terms of the power issue, thanks for the recommendation.  I re-routed the power cables and the quads have been running smoothly.  I'll send you the details/logs via email.
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May 09, 2012, 08:09:48 AM
 #387

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The effect can be reduced by reducing the number of devices per thread (parameter -n). But the only way to solv this is to choose a faster pool server.

Does reducing the number of devices also help if you're seeing overflows?

Usually yes. This depends on the amount of CPU cores, the size of the cluster and the OS. It's probably not wise to run 200 threads on a single core Atom.



Thanks, I will give it a try.  Also, not sure if anybody has already mentioned, the block log option is listed as -lb on the help instead of -bl

EDIT:  Just terminated the process remotely with control-c.  When trying to restart, got:
Code:
ztex_ufm1_15y1-2012-L5-A1: New device: bitfile=ztex_ufm1_15y1   f_default=200.00MHz  f_max=240.00MHz  HpC=1.0H
Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high, possible USB transfer errors (INIT_B_HIST=222): Retrying it ...
Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high, possible USB transfer errors (INIT_B_HIST=222): Retrying it ...
Warning: High speed FPGA configuration failed, trying low speed mode:Error uploading bitstream: FPGA configuration failed: DONE pin does not go high, possible USB transfer errors (INIT_B_HIST=222): Trying low speed mode
Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high (size=4220313 ,  0 bytes got lost;  checksum=3 , should be 3;  INIT_B_HIST=222): Retrying it ...
Warning: Error uploading bitstream: FPGA configuration failed: DONE pin does not go high (size=4220313 ,  0 bytes got lost;  checksum=3 , should be 3;  INIT_B_HIST=222): Retrying it ...
I have noticed this before with the quads that went away with a power-cycle.  any thoughts?

+1. Got the same problem several times. Boards are mining without problems. After stop of BTCMiner or reboot sometimes I got this "FPGA configuration failed" errors. Last time yesterday. I disconnected the boards from power for about 3 secs (power off, wait until fan stops, power on). Same error again. Once again power off, waiting around 30 secs, power on => success. Boards are mining fine since then.

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May 10, 2012, 05:26:29 PM
 #388

Ask him about the USB hubs ! Grin https://bitcointalk.org/index.php?topic=40058.msg891599#msg891599


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May 11, 2012, 06:33:34 AM
 #389

My theory is that these are poor quality USB hubs, and coupled with the 1-into-5 barrel plug splitter I use (its cable gets stupidly hot, so I am going to have to buy individual barrel plugs and wire them up myself to PCIe power adapters using your recommendation), I may be overloading the USB bus ground.

Is this likely? Or would overloading the USB ground simply 'let the smoke out of the wires'? Whilst my second test pentagon (I'm building my FPGA arrays in sets of five, in order to use 60W ATX power cables per set) has stupidly hot daisy-chain power cables, it hasn't failed yet.... though I'll be re-building it tomorrow. Incidentally, the 2.1/5.5 barrel splitter that gets really hot is a local Maplin part, not your Ztex part, which seems to stay cool. Must be better quality cable.

The power cables must not get warm or even hot.

For powering your amount of boards I recommend  this method: http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:cluster_power_supplies#usb-fpga_module_115x_and_115dlarge_clusters .

Most critical are the GND lines. As higher their resistance as more current flows through the USB shielding. Therefore I do not recommend daisy-chaining the power cables for larger amounts of boards.

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May 13, 2012, 04:49:20 PM
 #390


Oh yeah - and all 10 of my currently-running Ztex FPGAs (I have 25 to build) - are being controlled on Mac OS X Snow Leopard. So any potential Ztex buyers who run Apple Macs.... give me a shout and I'll send you 32-bit or 64-bit libraries for the libusb. Java works OK with the Apple runtime. I had to hack Stefan's makefiles but... needs must. Can't be arsed with building another Linux box, and I won't have Windows on my network.


I would be very interested in both the libraries and the recipe to build them myself. Given my ztex boards are running off a tp-link router, I would really like to avoid spinning out my windows or linux VM to update firmwares, and getting java in said router is not something I'm looking forward to do.
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May 13, 2012, 11:58:39 PM
 #391

Im a mac user too and would love to get them running by default under mac ... Then i can get rid of my paralells VM Smiley

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May 14, 2012, 01:05:27 AM
 #392

Hey Catfish, agree on the build quality of these boards. Would also love to get binaries for running them on OS X. Thanks.
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May 14, 2012, 08:26:05 AM
 #393

Hey Catfish, agree on the build quality of these boards. Would also love to get binaries for running them on OS X. Thanks.

See http://wiki.ztex.de/doku.php?id=en:software:porting&#macos_port

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May 14, 2012, 03:33:55 PM
 #394

Nice to know but where exactly am i supposed to copy that file to?  Working directory <--Where do i find that?

A complete link to a folder would be nice Smiley

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May 15, 2012, 08:44:15 AM
 #395

Nice to know but where exactly am i supposed to copy that file to?  Working directory <--Where do i find that?

A complete link to a folder would be nice Smiley

The working directory is the directory from where you start an application. It can be any directory.

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May 15, 2012, 08:59:02 PM
Last edit: May 20, 2012, 08:00:40 PM by BR0KK
 #396

Thank u ill try it Smiley

€: with my small knowledge of OSX (and linux) i can't get it to mine with osx.... Ill try it again but it would be nice if you could add OSX support some day in the future.


€1:
It kinda runs now. I copied the file to /library/Java/Extensions

in Terminal i can start BTCMiner now,. but it won't recognize any of my boards ....

if i run it with -i it displays "no devices found"




€2:
i installed libusb but can not talk my devices to mine with btcminer natively. Still no devices found.

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May 23, 2012, 08:10:18 AM
 #397

Thank u ill try it Smiley

€: with my small knowledge of OSX (and linux) i can't get it to mine with osx.... Ill try it again but it would be nice if you could add OSX support some day in the future.


€1:
It kinda runs now. I copied the file to /library/Java/Extensions

in Terminal i can start BTCMiner now,. but it won't recognize any of my boards ....

if i run it with -i it displays "no devices found"




€2:
i installed libusb but can not talk my devices to mine with btcminer natively. Still no devices found.

Looks like USB problems. I'm not familiar with Mac, but a wrong / non-existent libusb should be reported. Are there maybe permission constraints?

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May 23, 2012, 10:00:24 PM
Last edit: June 01, 2012, 09:57:17 PM by BR0KK
 #398

i have no clue Smiley

Maybe catfish can help me out


€: Saw the great work from eldertyrell today. Will there be a tricone bitstream for Ztex boards?

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June 09, 2012, 05:59:40 AM
 #399

Is Ztex the only one developing the Java BTCMiner?

Could it be run from source code or does one need to package it into the .jar file?

Is there anyone here who could give me a quick rundown what's required to get this to work after I made some changes to the source code (mostly to the logging functions for now)? I can donate some BTC in return!  (I'd like to do this on my Windows box for now)

Thanks!

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June 09, 2012, 08:12:36 AM
Last edit: June 10, 2012, 06:12:24 AM by gr0bi42
 #400

Is Ztex the only one developing the Java BTCMiner?

Could it be run from source code or does one need to package it into the .jar file?

Is there anyone here who could give me a quick rundown what's required to get this to work after I made some changes to the source code (mostly to the logging functions for now)? I can donate some BTC in return!  (I'd like to do this on my Windows box for now)

Thanks!



Ok, a quick'n'dirty howto...

Download(1): http://www.ztex.de/btcminer/ZtexBTCMiner-120417.tar.bz2 (BTCMiner Source)
Download(2): http://www.ztex.de/downloads/ztex-120412.tar.bz2 (EZ USB SDK)
Download(3): http://www.ztex.de/btcminer/ZtexBTCMiner-120417.jar (needed to extract bit-files)

Code:
> mkdir btcminer
> tar xfj ~/Downloads/ZtexBTCMiner-120417.tar.bz2
> tar xfj ~/Downloads/ztex-120412.tar.bz2
> mkdir tmp
> cd tmp
> jar xf ~/Downloads/ZtexBTCMiner-120417.jar
> cd ../bitminer-src

Now edit the Makefile and adjust ZTEXPREFIX to:
Code:
>vi Makefile
ZTEXPREFIX=../ztex

Copy the bit-files:
Code:
> cp ../tmp/fpga/*.bit fpga/

And finally:
Code:
> make
> java -cp ZtexBTCMiner.jar BTCMiner -host http://<host>:<port> -u <user> -p <pass> -m c

If you change something just do another make.

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