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Author Topic: X6500 Custom FPGA Miner  (Read 208190 times)
fizzisist
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April 14, 2013, 06:08:20 AM
 #1101

How about selling the FPGA design + code?  Then folks could "roll their own".

Yup...

Why not open source it... let the community pool it's resources and get these going.

Yes, I think this is a good idea and have been planning to talk with the others about it for a while now. Been too busy lately even to send around an email, so I certainly haven't looked at OSHW licenses and tried to figure all that out. Any experts on that stuff around here?

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Bicknellski
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April 14, 2013, 07:47:44 AM
 #1102

How about selling the FPGA design + code?  Then folks could "roll their own".

Yup...

Why not open source it... let the community pool it's resources and get these going.

Yes, I think this is a good idea and have been planning to talk with the others about it for a while now. Been too busy lately even to send around an email, so I certainly haven't looked at OSHW licenses and tried to figure all that out. Any experts on that stuff around here?

+1

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April 15, 2013, 11:17:38 AM
 #1103

Yes, they are all gone, sorry. At this point, a new production run would take 4-8 weeks, and who knows if BFL will be making ASICs by then (or ever). It's just too uncertain for us to invest all that money and risk getting stuck with a bunch of units.

Hi,
I've been looking at this board, and must say I'm quite impressed of the "cleanness" and quality of your design. I'd like to get one for FPGA experiments, but that would require the accompanying VHDL/Verilog code to program it with. Do you have it available somewhere? (What experiments have you done with it?) Or perhaps I have misunderstood, and it is not possible to re-program these FPGAs while on board?
In addition it seem that you do not deliver outside the US?

Anyway, don't worry about the ASICs, they will not be able to deliver anything in the next 4-8 weeks. BFL has shoot themselves in the foot by poor design choice and need to redesign. This has cost them dearly, and we can question if they can even afford to continue this project, without mining for themselves first. Which is probably what they are doing right now, if anything. Also, the majority of people doesn't wanna dump 1500+ USD to an overpriced ASIC, they just wanna try the technology out of curiosity, which is where your board is perfect.
phk
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April 15, 2013, 03:25:53 PM
 #1104

Also, the majority of people doesn't wanna dump 1500+ USD to an overpriced ASIC, they just wanna try the technology out of curiosity, which is where your board is perfect.

Isn't this an advertisement for GPU approach, not FPGA?  At least with GPU, when your interest wanes, you can still play Solitaire.
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April 15, 2013, 03:46:27 PM
 #1105

hi having some troubles with my board after running since dez2011 i think Wink

first i am getting
Quote
2013-04-15 17:31:21.901   [200]   X6500 board AH00WIX5 FPGA1:    Got H-not-zero share 00000000
2013-04-15 17:31:22.060   [200]   X6500 board AH00WIX5 FPGA0:    Got H-not-zero share 00000000
2013-04-15 17:31:22.120   [200]   X6500 board AH00WIX5 FPGA1:    Got H-not-zero share 00000000
2013-04-15 17:31:22.280   [200]   X6500 board AH00WIX5 FPGA0:    Got H-not-zero share 00000000
2013-04-15 17:31:22.339   [200]   X6500 board AH00WIX5 FPGA1:    Got H-not-zero share 00000000
2013-04-15 17:31:22.499   [200]   X6500 board AH00WIX5 FPGA0:    Got H-not-zero share 00000000

then mpbm wants to reset clockrate
Quote
2013-04-15 17:32:04.386   [500]   X6500 board AH00WIX5 FPGA0:    Tracking: Setting clock speed to 50.00 MHz...
2013-04-15 17:32:04.479   [100]   X6500 board AH00WIX5 FPGA0:    Traceback (most recent call last):
  File "/root/Modular-Python-Bitcoin-Miner2/modules/fpgamining/x6500/x6500worker.py", line 444, in main
    if self.firmware_rev > 0: self._set_speed(self.parent.settings.initialspeed)
  File "/root/Modular-Python-Bitcoin-Miner2/modules/fpgamining/x6500/x6500worker.py", line 666, in _set_speed
    self._update_job_interval()
  File "/root/Modular-Python-Bitcoin-Miner2/modules/fpgamining/x6500/x6500worker.py", line 676, in _update_job_interval
    interval = min(60, 2**32 / 1000000. / self.stats.mhps)
ZeroDivisionError: float division by zero

2013-04-15 17:32:05.051   [500]   X6500 board AH00WIX5 FPGA1:    Tracking: Setting clock speed to 50.00 MHz...
2013-04-15 17:32:05.212   [100]   X6500 board AH00WIX5 FPGA1:    Traceback (most recent call last):
  File "/root/Modular-Python-Bitcoin-Miner2/modules/fpgamining/x6500/x6500worker.py", line 444, in main
    if self.firmware_rev > 0: self._set_speed(self.parent.settings.initialspeed)
  File "/root/Modular-Python-Bitcoin-Miner2/modules/fpgamining/x6500/x6500worker.py", line 666, in _set_speed
    self._update_job_interval()
  File "/root/Modular-Python-Bitcoin-Miner2/modules/fpgamining/x6500/x6500worker.py", line 676, in _update_job_interval
    interval = min(60, 2**32 / 1000000. / self.stats.mhps)
ZeroDivisionError: float division by zero

last but not least the firmware will be reloaded, sometimes only FPGA0 comes up, and FPGA1 isn't mining

some ideas? i didn't ever change the setup, and that version of mpbm is running for a long time

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shad
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April 19, 2013, 02:00:29 PM
 #1106

changed power supply, problem solved

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ifeltsweet
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April 20, 2013, 01:06:40 PM
 #1107

I was under the impression that schematics are open sourced after visiting the website. However upon closer inspection I found those are only simplified schematics.

Is there any chance of you releasing the full schematic into the community?
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April 21, 2013, 07:23:18 AM
 #1108

It would be even more sexy if somehow your PCB's could be modified for the Avalon chips that are now on sale.

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April 21, 2013, 08:17:56 AM
 #1109

Also, the majority of people doesn't wanna dump 1500+ USD to an overpriced ASIC, they just wanna try the technology out of curiosity, which is where your board is perfect.

Isn't this an advertisement for GPU approach, not FPGA?  At least with GPU, when your interest wanes, you can still play Solitaire.


Actually this is where FPGA's have an advantage. They're not useful for the average user, but for hobbyists and anyone with a lot of data can reprogram it for anything. That's why FPGA's are so versatile and exceed ASIC's. You can reprogram an FPGA to work for SHA256 or even scrypt or for doing dictionary generation.

It would be even more sexy if somehow your PCB's could be modified for the Avalon chips that are now on sale.

Many people do not understand that FPGA's are not the same as ASIC's, even though I know you're just dreaming of the possibility.
shad
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April 21, 2013, 11:25:19 AM
 #1110

Actually this is where FPGA's have an advantage. They're not useful for the average user, but for hobbyists and anyone with a lot of data can reprogram it for anything. That's why FPGA's are so versatile and exceed ASIC's. You can reprogram an FPGA to work for SHA256 or even scrypt or for doing dictionary generation.

i don't think you can use it for scrypt, at least not this boards without any memory, but i guess many people would like to see a scrypt firmeware

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fizzisist
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May 02, 2013, 06:10:35 AM
 #1111

Handy with a DMM and a soldering iron? Bid on the X6500 "reject" grab bag!

https://bitcointalk.org/index.php?topic=193153

Selling off a box of 16 X6500s that are in various states of not working, AS-IS.

legendster
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May 02, 2013, 09:35:30 AM
 #1112

I was hoping to develop my own board for personal mining ... I was looking for all the Circuit component's values on the board with any other circuit diagram that is available with any of you guys.  Can ANYONE PLEASE help me ? I sent a similar message to the OP. *Fingers Crossed*

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May 09, 2013, 04:25:54 PM
 #1113

So I may have missed this somewhere, but was mining capability every implemented into CGMiner?
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May 09, 2013, 04:32:01 PM
 #1114

So I may have missed this somewhere, but was mining capability every implemented into CGMiner?

Yes, CGMiner or BFGMiner do not support X6500

360GH/s via AntMiner S1
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May 15, 2013, 03:43:57 AM
 #1115

So I may have missed this somewhere, but was mining capability every implemented into CGMiner?

Yes, CGMiner or BFGMiner do not support X6500

Wait, it was NOT implemented, right? I am still using MPBM on all of mine.

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May 15, 2013, 04:15:26 AM
 #1116

Last I checked it was implemented in at least one of them.

LiveJay
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May 17, 2013, 07:41:14 AM
 #1117

How about selling the FPGA design + code?  Then folks could "roll their own".

Yup...

Why not open source it... let the community pool it's resources and get these going.

Yes, I think this is a good idea and have been planning to talk with the others about it for a while now. Been too busy lately even to send around an email, so I certainly haven't looked at OSHW licenses and tried to figure all that out. Any experts on that stuff around here?

Any traction on this?  I'd be interested.

-Jay
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June 21, 2013, 07:55:31 PM
 #1118

How about selling the FPGA design + code?  Then folks could "roll their own".

Yup...

Why not open source it... let the community pool it's resources and get these going.

Yes, I think this is a good idea and have been planning to talk with the others about it for a while now. Been too busy lately even to send around an email, so I certainly haven't looked at OSHW licenses and tried to figure all that out. Any experts on that stuff around here?

Any traction on this?  I'd be interested.

-Jay

+1
TechCF
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June 22, 2013, 07:17:11 AM
 #1119

Last I checked it was implemented in at least one of them.

Yes, BFGminer supports it. https://github.com/luke-jr/bfgminer/blob/bfgminer/README.FPGA
torusJKL
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June 22, 2013, 07:22:07 AM
 #1120

Last I checked it was implemented in at least one of them.

Yes, BFGminer supports it. https://github.com/luke-jr/bfgminer/blob/bfgminer/README.FPGA

I have 3 X6500 sucessfully running with bfgminer.
But they are not recognized automatically.

I had to add this to the miner.conf file:
Code:
"scan-serial" : [
        "x6500:AH00WTG2",
        "x6500:AH00WO4E",
        "x6500:AH00WUK4"
],

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