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Author Topic: X6500 Custom FPGA Miner  (Read 219792 times)
fizzisist (OP)
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December 24, 2011, 05:09:30 PM
 #261

228.66 MH/s | 0: 2238/210/0 8.6% | 1: 2309/227/0 9.0% | 1d21m22s

Running the 133MHz bitstreams, not sure exactly why the rate is so low. Maybe just a run of bad luck.

Glad to see it running for an extended period now! The hashrate you see is based on the number of shares submitted in the last hour, so it can fluctuate. If I look at the total number of shares submitted the whole time it's been running, you can see that you're still a little bit lower than typical:

Shares submitted: 2238+210+2309+227 = 4984
Running time: 1d21m22s = (24*60 + 21) * 60 + 22 = 87682 s
Effective hashrate = Shares * 2^32 / Time = 244.1 MH/s

That's lower than the lowest performance I saw during testing. Could you PM me your serial number so I can look up the performance I saw with this board? That will tell us if it's an issue with the board or some difference in how it runs on your system.

Thanks!

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December 24, 2011, 05:32:28 PM
 #262

I am getting an error on my old XP box that says it cannot encode character \u2588

Anyone else get this.

And sorry if I missed something.

After it errors it seems like the FPGA gets a bit hotter too. It runs cool when it is running though.

That error is probably because of that "sparkline" stuff in ConsoleLogger.py that I once thought was a great idea. I think that character is the largest one on the list of available characters, and I just removed it from the latest version in Github. Could you try it now to see if the problem is fixed for you? If it isn't we can completely comment out that section of the code and be done with it (unless you really want that sparkline in there).

I am heading out for a few days for XMas, and don't want to test when I am not home. So I will check it out when I get back on Monday.

Thanks for the quick response!
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December 26, 2011, 07:16:02 PM
 #263

I am getting an error on my old XP box that says it cannot encode character \u2588

Anyone else get this.

And sorry if I missed something.

After it errors it seems like the FPGA gets a bit hotter too. It runs cool when it is running though.

That error is probably because of that "sparkline" stuff in ConsoleLogger.py that I once thought was a great idea. I think that character is the largest one on the list of available characters, and I just removed it from the latest version in Github. Could you try it now to see if the problem is fixed for you? If it isn't we can completely comment out that section of the code and be done with it (unless you really want that sparkline in there).

I just had a crash with \u2587 this time. It took a bit longer to get to than normal.
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December 28, 2011, 12:11:28 AM
 #264

I am getting an error on my old XP box that says it cannot encode character \u2588

Anyone else get this.

And sorry if I missed something.

After it errors it seems like the FPGA gets a bit hotter too. It runs cool when it is running though.

That error is probably because of that "sparkline" stuff in ConsoleLogger.py that I once thought was a great idea. I think that character is the largest one on the list of available characters, and I just removed it from the latest version in Github. Could you try it now to see if the problem is fixed for you? If it isn't we can completely comment out that section of the code and be done with it (unless you really want that sparkline in there).

I just had a crash with \u2587 this time. It took a bit longer to get to than normal.

I manually changed the python file, and replaced the fancy ascii characters with numerals between 0 and 6. It isn't as beautiful, but it doesn't crash the system, and the same info is conveyed.
fizzisist (OP)
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December 28, 2011, 06:37:30 AM
 #265

That error is probably because of that "sparkline" stuff in ConsoleLogger.py that I once thought was a great idea. I think that character is the largest one on the list of available characters, and I just removed it from the latest version in Github. Could you try it now to see if the problem is fixed for you? If it isn't we can completely comment out that section of the code and be done with it (unless you really want that sparkline in there).

I just had a crash with \u2587 this time. It took a bit longer to get to than normal.

I manually changed the python file, and replaced the fancy ascii characters with numerals between 0 and 6. It isn't as beautiful, but it doesn't crash the system, and the same info is conveyed.

Ah, nice work! Sorry, I guess those characters don't work on Windows XP although they seemed to work fine on Windows 7 when I tested it. I think I'll just remove that whole feature from the code for now, until I figure out what needs to be done to make it totally cross platform.

My focus this week will be to get to higher hashrates and implement long-polling, but please everyone let me know if you come across any more bugs or have any ideas for new features. Thanks!

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December 28, 2011, 12:02:48 PM
 #266


My focus this week will be to get to higher hashrates and implement long-polling, but please everyone let me know if you come across any more bugs or have any ideas for new features. Thanks!

I think absolutely everyone will agree that long-polling would be the most important feature you could implement!

Any word on the barrel connectors you said Cablesaurus might be getting soon?
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December 28, 2011, 01:54:04 PM
 #267

Hello

I just got my board an am trying to get it to work on windows 7.
I installed the software parts according to the guide.

But wenn i try to run the program.py i get the following error:
Code:
C:\Users\O_Shovah\Desktop\FPGA_x6500\fizzisist_x6500_miner>program.py C:\Users\O
_Shovah\Desktop\FPGA_x6500\Bitstreams\fpgaminer_50mhz.bit
Traceback (most recent call last):
  File "C:\Users\O_Shovah\Desktop\FPGA_x6500\fizzisist_x6500_miner\program.py",
line 23, in <module>
    from ft232r import FT232R, FT232R_PortList
  File "C:\Users\O_Shovah\Desktop\FPGA_x6500\fizzisist_x6500_miner\ft232r.py", l
ine 22, in <module>
    import d2xx
ImportError: No module named d2xx
It seems there's a problem with the FTDI driver but it should have installed correctly.

Any ideas where i went wrong ?

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December 28, 2011, 02:47:06 PM
 #268

Do you have the D2xx drivers and the right version of pyusb installed for your version of python?
fizzisist (OP)
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December 28, 2011, 07:16:39 PM
Last edit: December 28, 2011, 08:51:54 PM by fizzisist
 #269


My focus this week will be to get to higher hashrates and implement long-polling, but please everyone let me know if you come across any more bugs or have any ideas for new features. Thanks!

I think absolutely everyone will agree that long-polling would be the most important feature you could implement!

Any word on the barrel connectors you said Cablesaurus might be getting soon?

I received one and tested it out this weekend, and it gets my stamp of approval. Cablesaurus should have them in stock soon. I'll see if I can get an ETA.

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December 28, 2011, 10:14:58 PM
 #270

Just ordered one of the X6500 boards. Looking to grab a barrel connector to power it. Will one of these work: http://www.ebay.com/itm/AC-100V-240V-Converter-Adapter-DC-12V-1-5A-Power-Supply-/320749488518?pt=LH_DefaultDomain_0&hash=item4aae28c986 ?

Cheers!

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December 28, 2011, 10:17:52 PM
Last edit: December 28, 2011, 10:34:36 PM by freshzive
 #271

Err, it looks like those are shipping from Hong Kong though. Can someone recommend a good AC adapter that ships from inside the US?

EDIT: Ended up ordering one of these: http://www.ebay.com/itm/270728205788?ssPageName=STRK:MEWNX:IT&_trksid=p3984.m1497.l2649

fizzisist (OP)
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December 29, 2011, 06:03:10 AM
 #272

Err, it looks like those are shipping from Hong Kong though. Can someone recommend a good AC adapter that ships from inside the US?

EDIT: Ended up ordering one of these: http://www.ebay.com/itm/270728205788?ssPageName=STRK:MEWNX:IT&_trksid=p3984.m1497.l2649

Looks like a good find for the price. The only problem I can see is that the current output is almost cutting it close. 18W is not a lot of margin over the 16W I've been seeing during testing. I would just keep an eye on it to see if it's getting really hot or something (the wall wart, that is).

In other news, I now have a crude implementation of long-polling in the latest version on Github. So far it seems to be working, but I really need more testers, especially on different pools. Please try it out!

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December 29, 2011, 07:58:19 AM
 #273

Quote
2011-12-29 08:57:05 | (FPGA0) Job data loaded
2011-12-29 08:57:07 | (FPGA1) Job data loaded
2011-12-29 08:57:09 | Long-poll: new block 00000ccbc11813e4
2011-12-29 08:57:12 | (FPGA0) Job data loaded
2011-12-29 08:57:12 | (FPGA1) Job data loaded
2011-12-29 08:57:19 | (FPGA0) Golden nonce found
2011-12-29 08:57:19 | (FPGA0) accepted e1b54ce8L
280.69 MH/s | 0: 8/0/0 0.0% | 1: 7/0/0 0.0% | 3m42s

looks good at slush's pool

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O_Shovah
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December 29, 2011, 03:00:27 PM
 #274

The board is now mining for some hours at Bitcoins.lc pool.

It mines at 250mh/s and gets some few RPC upload errors.

My earlier error was  i got the wrong phyton version.

@fizzisist:

Maybe for windows users the  complete executable for 2.6.7 might be handy
to be found at http://www.activestate.com/activepython/downloads

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December 30, 2011, 06:52:13 AM
 #275

The board is now mining for some hours at Bitcoins.lc pool.

It mines at 250mh/s and gets some few RPC upload errors.

My earlier error was  i got the wrong phyton version.

@fizzisist:

Maybe for windows users the  complete executable for 2.6.7 might be handy
to be found at http://www.activestate.com/activepython/downloads

That's great! Sorry, I hadn't noticed that the python site only has the source for 2.6.7. It makes much more sense to link to a compiled version, either your link or 2.6.6. I'll update the guide.

By the way, another user and I finally solved a problem he was having with x6500-miner on Linux. It turns out that FTDI put out a new Linux version of the D2XX drivers which is incompatible with my hacked PyUSB solution. If you installed libftd2xx version 1.1.0 and having problems, please download v1.0.4 from the Software guide.

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January 01, 2012, 12:24:56 AM
 #276

Quote
2011-12-29 08:57:05 | (FPGA0) Job data loaded
2011-12-29 08:57:07 | (FPGA1) Job data loaded
2011-12-29 08:57:09 | Long-poll: new block 00000ccbc11813e4
2011-12-29 08:57:12 | (FPGA0) Job data loaded
2011-12-29 08:57:12 | (FPGA1) Job data loaded
2011-12-29 08:57:19 | (FPGA0) Golden nonce found
2011-12-29 08:57:19 | (FPGA0) accepted e1b54ce8L
280.69 MH/s | 0: 8/0/0 0.0% | 1: 7/0/0 0.0% | 3m42s

looks good at slush's pool

I always get 'Long-poll: Value error!' followed shortly by a long poll connection string.

It seems to be working though (no stales or anything).

This is at ABCPool.co
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January 01, 2012, 09:35:15 AM
 #277

Hi,

The other two available fpga bitcoin boards have an open design - I can reuse them for different purpose, re-program or sale them as fpga dev kits if I decide to stop mining with them.
I would at least like to generate my own bitstream with your board, will this be possible? Will you release the schematic?
fizzisist (OP)
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January 01, 2012, 06:56:43 PM
 #278

Happy New Year, everyone!

Quote
2011-12-29 08:57:05 | (FPGA0) Job data loaded
2011-12-29 08:57:07 | (FPGA1) Job data loaded
2011-12-29 08:57:09 | Long-poll: new block 00000ccbc11813e4
2011-12-29 08:57:12 | (FPGA0) Job data loaded
2011-12-29 08:57:12 | (FPGA1) Job data loaded
2011-12-29 08:57:19 | (FPGA0) Golden nonce found
2011-12-29 08:57:19 | (FPGA0) accepted e1b54ce8L
280.69 MH/s | 0: 8/0/0 0.0% | 1: 7/0/0 0.0% | 3m42s

looks good at slush's pool

I always get 'Long-poll: Value error!' followed shortly by a long poll connection string.

It seems to be working though (no stales or anything).

This is at ABCPool.co

Very strange... I'll run one against ABCPool myself and see if I can figure out why that is.

The other two available fpga bitcoin boards have an open design - I can reuse them for different purpose, re-program or sale them as fpga dev kits if I decide to stop mining with them.
I would at least like to generate my own bitstream with your board, will this be possible? Will you release the schematic?

Yes, you can certainly try your hand at developing a new bitstream, or develop different applications for the board. You just need to tell ISE the part and the clock pin. It's the Spartan 6 LX150, -3 speed grade, FG484 package. The clock pin is K20 and 2.5V. All communication including bitstream loading is done over JTAG, and handled by the FT232R over USB. If you want to bypass the FT232R, the JTAG pins for each FPGA are broken out to a pin header and labeled on the board. I think I'll write all this up in a separate document and post it on the website. Let me know if you think any other info would be helpful!

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January 02, 2012, 03:15:06 AM
 #279

Quote
2011-12-29 08:57:05 | (FPGA0) Job data loaded
2011-12-29 08:57:07 | (FPGA1) Job data loaded
2011-12-29 08:57:09 | Long-poll: new block 00000ccbc11813e4
2011-12-29 08:57:12 | (FPGA0) Job data loaded
2011-12-29 08:57:12 | (FPGA1) Job data loaded
2011-12-29 08:57:19 | (FPGA0) Golden nonce found
2011-12-29 08:57:19 | (FPGA0) accepted e1b54ce8L
280.69 MH/s | 0: 8/0/0 0.0% | 1: 7/0/0 0.0% | 3m42s

looks good at slush's pool

I always get 'Long-poll: Value error!' followed shortly by a long poll connection string.

It seems to be working though (no stales or anything).

This is at ABCPool.co

Actually, stales are actually pretty high still. What are other people getting for stale rates.

I can try another pool for now!
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January 02, 2012, 10:39:58 AM
 #280

243.94 MH/s | 0: 9305/772/0 7.7% | 1: 9282/836/0 8.3% | 4d2h45m

before the LP support i had around 10% stale, now i hab 8%, also V0.11 is stable for me

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