ZTEX USB-FPGA Modules 1.15x and 1.15y: 215 and 860 MH/s FPGA Boards

[BR0KK]

Chopper and plexy. Since they don't dissapate that much u coud keep the structure of the cooler simple..

Problem with that design is that the jtag port can't be used since u placed the outlet there.

And a little airflow is needed for VRM area....

[1714284589]

1714284589

[1714284589]

1714284589

[Hpman]

Problem with that design is that the jtag port can't be used since u placed the outlet there.

May Ztex let it unpopulated for next boards. I guess more then 90% 'll never use it. Feature request (wish) from my side if new revision is planed, mounting holes match 12 cm fan holes.

Hpman

[ztex]

First fullcover waterblock "print' - http://www.abload.de/img/fcpga1wc6kutn.jpg

Next week should be ready for testing...
I myst just check somme more specs in the board, and decude, to cool power section or not?

Does the "waterblock" cover all FPGA's? If yes, this is critical because the surfaces of the packages are usually not exactly on one plane (PCB may be bent, height of the soldered FPGA's varies)

Also I do not recommend to cover the voltage regulators near the FPGA's.

[ztex]

Problem with that design is that the jtag port can't be used since u placed the outlet there.

May Ztex let it unpopulated for next boards. I guess more then 90% 'll never use it.

JTAG header CON9 is required for programming the CPLD. This thing is used for clock distribution and FPGA configuration http://www.ztex.de/usb-fpga-1/usb-fpga-1.15y.e.html#cpld.

Feature request (wish) from my side if new revision is planed, mounting holes match 12 cm fan holes.

I checked this during the design: The position of these holes is blocked by parts. The PCB would have to be enlarged by about 1cm in order to accommodate 12cm fan holes (fan would have to be shifted into direction of CON4)

[rupy]

Are you planning to overclock the chips, is that what this watercooling thing is about?

[ummas]

Watercooling is for cooling boards with water.
I hope ztex`s program will do the rest

[BR0KK]

I dontthink that will do so much?
But its a Fun Thing to do:)

Looking forward to see real live pics

[vv01f]

@ztex:
after trying to get one quad-board (labeled 1.15x) running on Linux (Ubuntu 12.04) I have growing problems with one of the FPGAs
that chip already was the slowest in my setup leveling in to 208 MHz (all others do at least 216 Mhz) previously on Windows 7 .
after realizing to utilize sudo also the linux-client ran right off, but it shut down the FPGA #2 due to increasing hash rate drop (4-10%). That I already had with -oh 0 on Windows 7, but with -oh 0.04 it was OK on 208 MHz.
Now reconnecting to Windows for double-checking the hash rate drop also occurred there, #2 is disconnected due to that.
I already remounted the cooler two times, covering of the chip with MX4 looked ok, nothing besides the chip.

Any ideas what to check/try next  


*edit, replaced "error" with correct term "hash rate drop" :
while writing also #1 is disconnected for hash rate drop rate 4% and the others are leveling down to 212 MHz .. I think it better to power that one off.  

[Turbor]

@ztex:
after trying to get one quad-board (labeled 1.15x) running on Linux (Ubuntu 12.04) I have growing problems with one of the FPGAs
that chip already was the slowest in my setup leveling in to 208 MHz (all others do at least 216 Mhz) previously on Windows 7 .
after realizing to utilize sudo also the linux-client ran right off, but it shut down the FPGA #2 due to increasing errors (4-10%). That I already had with -oh 0 on Windows 7, but with -oh 0.04 it was OK on 208 MHz.
Now reconnecting to Windows for double-checking the error also occurred there, #2 is disconnected due to error rate.
I already remounted the cooler two times, covering of the chip with MX4 looked ok, nothing besides the chip.

Any ideas what to check/try next  

Set -oh to another value. Try 0.1. This way you can see how low it will fall. I have one chip on my quad that only works from time to time. If I set it to 0.7 the overheat protection takes the chip down at 60 MHz = 70% hashrate drop.

[vv01f]

Set -oh to another value. Try 0.1. This way you can see how low it will fall. I have one chip on my quad that only works from time to time. If I set it to 0.7 the overheat protection takes the chip down at 60 MHz = 70% hashrate drop.

Thank you for the backing -so I'm not alone ^^ .
The help says better not to set >0.1 - so I wont try that for now.

Now two boards on Ubuntu, but still the one FPGA #2 fails, #3 of the same board is down to 200 MHz (16 less than before). Others run the same stepping as before.
Hope next Friday evening is brighter than today ...

[Turbor]

Set -oh to another value. Try 0.1. This way you can see how low it will fall. I have one chip on my quad that only works from time to time. If I set it to 0.7 the overheat protection takes the chip down at 60 MHz = 70% hashrate drop.

Thank you for the backing -so I'm not alone ^^ .
The help says better not to set >0.1 - so I wont try that for now.

Now two boards on Ubuntu, but still the one FPGA #2 fails, #3 of the same board is down to 200 MHz (16 less than before). Others run the same stepping as before.
Hope next Friday evening is brighter than today ...

There is nothing else you can do. You can set it to 0.08 or 0.09 if you are afraid. You cannot damage the chip if the heatsink is well placed. It will just clock down.

[BR0KK]

Mine used to fail from time to time. Since i did -oh to 0.2 everything is hashing good

[vv01f]

Mine used to fail from time to time. Since i did -oh to 0.2 everything is hashing good

I remember ztex telling better not changing -oh >0.1 and the prog says the same, so to prevent further damage I stick to that until he says sth. else.
Also the hash rate drop here occures right after start - very fast, no real runtime at 200 MHz.

Just some logging now:

Code:

2012-06-11T06:42:11: 
(Re)Scanning bus ... 
2012-06-11T06:42:11: MAC address: 0004a36e0711
2012-06-11T06:42:11: ztex_ufm1_15y1-04A36E0711: New device: bitfile=ztex_ufm1_15y1   f_default=200,00MHz  f_max=240,00MHz  HpC=1.0H
2012-06-11T06:42:12: ztex_ufm1_15y1-04A36E0711: FPGA 1: configuration time: 332 ms
2012-06-11T06:42:13: ztex_ufm1_15y1-04A36E0711: FPGA 2: configuration time: 345 ms
2012-06-11T06:42:13: ztex_ufm1_15y1-04A36E0711: FPGA 3: configuration time: 341 ms
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36E0711: FPGA 4: configuration time: 349 ms
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36E0711-1: New FPGA
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36E0711-1: Set frequency to 200,00MHz
2012-06-11T06:42:14: Starting mining thread for bus 001-0
2012-06-11T06:42:14: 001-0: ztex_ufm1_15y1-04A36E0711-1: added
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36E0711-2: New FPGA
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 200,00MHz
2012-06-11T06:42:14: 001-0: ztex_ufm1_15y1-04A36E0711-2: added
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36E0711-3: New FPGA
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36E0711-3: Set frequency to 200,00MHz
2012-06-11T06:42:14: 001-0: ztex_ufm1_15y1-04A36E0711-3: added
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36E0711-4: New FPGA
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36E0711-4: Set frequency to 200,00MHz
2012-06-11T06:42:14: 001-0: ztex_ufm1_15y1-04A36E0711-4: added
2012-06-11T06:42:14: MAC address: 0004a36de0aa
2012-06-11T06:42:14: ztex_ufm1_15y1-04A36DE0AA: New device: bitfile=ztex_ufm1_15y1   f_default=200,00MHz  f_max=240,00MHz  HpC=1.0H
2012-06-11T06:42:15: ztex_ufm1_15y1-04A36DE0AA: FPGA 1: configuration time: 346 ms
2012-06-11T06:42:16: ztex_ufm1_15y1-04A36DE0AA: FPGA 2: configuration time: 346 ms
2012-06-11T06:42:17: ztex_ufm1_15y1-04A36DE0AA: FPGA 3: configuration time: 350 ms
2012-06-11T06:42:17: ztex_ufm1_15y1-04A36DE0AA: FPGA 4: configuration time: 339 ms
2012-06-11T06:42:17: ztex_ufm1_15y1-04A36DE0AA-1: New FPGA
2012-06-11T06:42:17: ztex_ufm1_15y1-04A36DE0AA-1: Set frequency to 200,00MHz
2012-06-11T06:42:17: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: added
2012-06-11T06:42:17: ztex_ufm1_15y1-04A36DE0AA-2: New FPGA
2012-06-11T06:42:17: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 200,00MHz
2012-06-11T06:42:17: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: added
2012-06-11T06:42:17: ztex_ufm1_15y1-04A36DE0AA-3: New FPGA
2012-06-11T06:42:17: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 200,00MHz
2012-06-11T06:42:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: added
2012-06-11T06:42:18: ztex_ufm1_15y1-04A36DE0AA-4: New FPGA
2012-06-11T06:42:18: ztex_ufm1_15y1-04A36DE0AA-4: Set frequency to 200,00MHz
2012-06-11T06:42:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-4: added
2012-06-11T06:42:18: 2 new devices found.
2012-06-11T06:42:18: 
Summary: 
2012-06-11T06:42:18:   Bus 001-0	: 8 miners
2012-06-11T06:42:18:   Total  	: 8 miners

2012-06-11T06:42:18: 
Disconnect all devices or enter `q' for exit. Enter `h' for help.

2012-06-11T06:42:19: 001-0: ztex_ufm1_15y1-04A36DE0AA-4: Using LongPolling URL http://i0pool.bitparking.com:15082/longpoll
2012-06-11T06:42:24: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 196,00MHz
2012-06-11T06:42:27: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 200,00MHz
2012-06-11T06:42:33: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 196,00MHz
2012-06-11T06:42:35: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 192,00MHz
2012-06-11T06:42:38: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 196,00MHz
2012-06-11T06:42:43: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 192,00MHz
2012-06-11T06:42:45: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 188,00MHz
2012-06-11T06:42:50: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 196,00MHz
2012-06-11T06:42:52: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 192,00MHz
2012-06-11T06:42:58: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 188,00MHz
2012-06-11T06:43:01: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 184,00MHz
2012-06-11T06:43:08: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 192,00MHz
2012-06-11T06:43:10: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 188,00MHz
2012-06-11T06:43:12: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 184,00MHz
2012-06-11T06:43:14: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Set frequency to 180,00MHz
2012-06-11T06:43:14: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Error: Hash rate drop of 10,0% detect. This may be caused by overheating. FPGA is shut down to prevent damage.  50.0: Disabling device
2012-06-11T06:43:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: f=200,00MHz,  errorRate=0,00%,  hashRate=200,0MH/s,  submitted 1 new nonces,  luckFactor=0,36
2012-06-11T06:43:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Error: Hash rate drop of 10,0% detect. This may be caused by overheating. FPGA is shut down to prevent damage.  50.0: Device disabled since 2012-06-11T06:43:14
2012-06-11T06:43:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: f=200,00MHz,  errorRate=0,00%,  hashRate=200,0MH/s,  submitted 2 new nonces,  luckFactor=0,72
2012-06-11T06:43:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-4: f=200,00MHz,  errorRate=0,00%,  hashRate=200,0MH/s,  submitted 1 new nonces,  luckFactor=0,36
2012-06-11T06:43:18: 001-0: ztex_ufm1_15y1-04A36E0711-1: f=200,00MHz,  errorRate=0,00%,  hashRate=200,0MH/s,  submitted 1 new nonces,  luckFactor=0,36
2012-06-11T06:43:18: 001-0: ztex_ufm1_15y1-04A36E0711-2: f=200,00MHz,  errorRate=0,00%,  hashRate=200,0MH/s,  submitted 2 new nonces,  luckFactor=0,72
2012-06-11T06:43:18: 001-0: ztex_ufm1_15y1-04A36E0711-3: f=200,00MHz,  errorRate=0,00%,  hashRate=200,0MH/s,  submitted 4 new nonces,  luckFactor=1,43
2012-06-11T06:43:18: 001-0: ztex_ufm1_15y1-04A36E0711-4: f=200,00MHz,  errorRate=0,00%,  hashRate=200,0MH/s,  submitted 3 new nonces,  luckFactor=1,08
2012-06-11T06:43:18: 001-0: poll loop time: 417ms (USB: 21ms network: 396ms)   getwork time: 749ms  submit time: 863ms
2012-06-11T06:43:18: Total hash rate: 1400,0 MH/s
2012-06-11T06:43:18: Total submitted hash rate: 1000,2 MH/s
2012-06-11T06:43:18:  -------- 
2012-06-11T06:44:26: 001-0: ztex_ufm1_15y1-04A36E0711-3: Set frequency to 204,00MHz
2012-06-11T06:44:27: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 204,00MHz
2012-06-11T06:44:28: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 204,00MHz
2012-06-11T06:44:28: 001-0: ztex_ufm1_15y1-04A36DE0AA-4: Set frequency to 204,00MHz
2012-06-11T06:44:28: 001-0: ztex_ufm1_15y1-04A36E0711-1: Set frequency to 204,00MHz
2012-06-11T06:44:28: 001-0: ztex_ufm1_15y1-04A36E0711-4: Set frequency to 204,00MHz
2012-06-11T06:44:29: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: Set frequency to 204,00MHz
2012-06-11T06:44:33: 001-0: ztex_ufm1_15y1-04A36DE0AA-4: Set frequency to 200,00MHz
2012-06-11T06:45:03: New block detected by long polling
2012-06-11T06:46:38: New block detected by long polling
2012-06-11T06:47:14: New block detected by long polling
2012-06-11T06:48:08: 001-0: ztex_ufm1_15y1-04A36E0711-3: Set frequency to 208,00MHz
2012-06-11T06:48:09: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 208,00MHz
2012-06-11T06:48:10: 001-0: ztex_ufm1_15y1-04A36E0711-4: Set frequency to 208,00MHz
2012-06-11T06:48:11: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: Set frequency to 208,00MHz
2012-06-11T06:48:10: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 208,00MHz
2012-06-11T06:48:14: 001-0: ztex_ufm1_15y1-04A36E0711-1: Set frequency to 208,00MHz
2012-06-11T06:48:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: f=208,00MHz,  submitted 14 new nonces,  luckFactor=0,86
2012-06-11T06:48:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Error: Hash rate drop of 10,0% detect. This may be caused by overheating. FPGA is shut down to prevent damage.  50.0: Device disabled since 2012-06-11T06:43:14
2012-06-11T06:48:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: f=208,00MHz,  submitted 9 new nonces,  luckFactor=0,64
2012-06-11T06:48:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-4: f=200,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=200,0MH/s,  submitted 11 new nonces,  luckFactor=0,72
2012-06-11T06:48:18: 001-0: ztex_ufm1_15y1-04A36E0711-1: f=208,00MHz,  submitted 8 new nonces,  luckFactor=0,52
2012-06-11T06:48:18: 001-0: ztex_ufm1_15y1-04A36E0711-2: f=208,00MHz,  submitted 10 new nonces,  luckFactor=0,69
2012-06-11T06:48:18: 001-0: ztex_ufm1_15y1-04A36E0711-3: f=208,00MHz,  submitted 13 new nonces,  luckFactor=0,98
2012-06-11T06:48:18: 001-0: ztex_ufm1_15y1-04A36E0711-4: f=208,00MHz,  submitted 22 new nonces,  luckFactor=1,44
2012-06-11T06:48:18: 001-0: poll loop time: 429ms (USB: 15ms network: 414ms)   getwork time: 692ms  submit time: 720ms
2012-06-11T06:48:18: 001-0: Warning: 13 overflows occured. This is usually caused by a slow network connection.
2012-06-11T06:48:18: Total hash rate: 1448,0 MH/s
2012-06-11T06:48:18: Total submitted hash rate: 1204,3 MH/s
2012-06-11T06:48:18:  -------- 
2012-06-11T06:49:58: New block detected by long polling
2012-06-11T06:50:16: 001-0: ztex_ufm1_15y1-04A36E0711-3: Set frequency to 212,00MHz
2012-06-11T06:50:16: 001-0: ztex_ufm1_15y1-04A36E0711-4: Set frequency to 212,00MHz
2012-06-11T06:50:17: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 212,00MHz
2012-06-11T06:50:17: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 212,00MHz
2012-06-11T06:50:17: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: Set frequency to 212,00MHz
2012-06-11T06:50:21: 001-0: ztex_ufm1_15y1-04A36E0711-1: Set frequency to 212,00MHz
2012-06-11T06:51:32: New block detected by block monitor
2012-06-11T06:51:33: New block detected by long polling
2012-06-11T06:52:00: 001-0: ztex_ufm1_15y1-04A36E0711-3: Set frequency to 216,00MHz
2012-06-11T06:52:01: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 216,00MHz
2012-06-11T06:52:01: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: Set frequency to 216,00MHz
2012-06-11T06:52:01: 001-0: ztex_ufm1_15y1-04A36E0711-4: Set frequency to 216,00MHz
2012-06-11T06:52:01: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 216,00MHz
2012-06-11T06:52:05: 001-0: ztex_ufm1_15y1-04A36E0711-1: Set frequency to 216,00MHz
2012-06-11T06:52:09: New block detected by long polling
2012-06-11T06:52:22: New block detected by long polling
2012-06-11T06:53:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: f=216,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=216,0MH/s,  submitted 15 new nonces,  luckFactor=0,91
2012-06-11T06:53:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Error: Hash rate drop of 10,0% detect. This may be caused by overheating. FPGA is shut down to prevent damage.  50.0: Device disabled since 2012-06-11T06:43:14
2012-06-11T06:53:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: f=216,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=216,0MH/s,  submitted 16 new nonces,  luckFactor=0,82
2012-06-11T06:53:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-4: f=200,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=200,0MH/s,  submitted 15 new nonces,  luckFactor=0,88
2012-06-11T06:53:18: 001-0: ztex_ufm1_15y1-04A36E0711-1: f=216,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=216,0MH/s,  submitted 22 new nonces,  luckFactor=0,94
2012-06-11T06:53:18: 001-0: ztex_ufm1_15y1-04A36E0711-2: f=216,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=216,0MH/s,  submitted 12 new nonces,  luckFactor=0,73
2012-06-11T06:53:18: 001-0: ztex_ufm1_15y1-04A36E0711-3: f=216,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=216,0MH/s,  submitted 10 new nonces,  luckFactor=0,82
2012-06-11T06:53:18: 001-0: ztex_ufm1_15y1-04A36E0711-4: f=216,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=216,0MH/s,  submitted 12 new nonces,  luckFactor=1,12
2012-06-11T06:53:18: 001-0: poll loop time: 274ms (USB: 14ms network: 260ms)   getwork time: 505ms  submit time: 621ms
2012-06-11T06:53:18: 001-0: Warning: 1 overflows occured. This is usually caused by a slow network connection.
2012-06-11T06:53:18: Total hash rate: 1496,0 MH/s
2012-06-11T06:53:18: Total submitted hash rate: 1320,5 MH/s
2012-06-11T06:53:18:  -------- 
2012-06-11T06:53:24: 001-0: ztex_ufm1_15y1-04A36E0711-3: Set frequency to 220,00MHz
2012-06-11T06:53:24: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: Set frequency to 220,00MHz
2012-06-11T06:53:24: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 220,00MHz
2012-06-11T06:53:26: 001-0: ztex_ufm1_15y1-04A36E0711-4: Set frequency to 220,00MHz
2012-06-11T06:53:26: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 220,00MHz
2012-06-11T06:53:30: 001-0: ztex_ufm1_15y1-04A36E0711-1: Set frequency to 220,00MHz
2012-06-11T06:53:50: 001-0: ztex_ufm1_15y1-04A36E0711-3: Set frequency to 216,00MHz
2012-06-11T06:54:05: New block detected by long polling
2012-06-11T06:54:09: 001-0: ztex_ufm1_15y1-04A36E0711-1: Set frequency to 216,00MHz
2012-06-11T06:54:47: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: Set frequency to 224,00MHz
2012-06-11T06:54:48: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 224,00MHz
2012-06-11T06:54:49: 001-0: ztex_ufm1_15y1-04A36E0711-4: Set frequency to 224,00MHz
2012-06-11T06:54:51: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 224,00MHz
2012-06-11T06:54:55: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 220,00MHz
2012-06-11T06:54:56: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 220,00MHz
2012-06-11T06:55:01: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: Set frequency to 220,00MHz
2012-06-11T06:55:04: New block detected by long polling
2012-06-11T06:55:07: New block detected by block monitor
2012-06-11T06:55:11: New block detected by long polling
2012-06-11T06:55:23: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 224,00MHz
2012-06-11T06:55:28: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 220,00MHz
2012-06-11T06:56:03: New block detected by long polling
2012-06-11T06:56:15: 001-0: ztex_ufm1_15y1-04A36E0711-4: Set frequency to 228,00MHz
2012-06-11T06:56:41: New block detected by long polling
2012-06-11T06:56:48: 001-0: ztex_ufm1_15y1-04A36E0711-4: Set frequency to 224,00MHz
2012-06-11T06:57:38: New block detected by long polling
2012-06-11T06:58:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: f=220,00MHz,  errorRate=0,09%,  maxErrorRate=0,89%,  hashRate=219,8MH/s,  submitted 13 new nonces,  luckFactor=0,88
2012-06-11T06:58:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Error: Hash rate drop of 10,0% detect. This may be caused by overheating. FPGA is shut down to prevent damage.  50.0: Device disabled since 2012-06-11T06:43:14
2012-06-11T06:58:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: f=220,00MHz,  errorRate=0,37%,  maxErrorRate=0,86%,  hashRate=219,2MH/s,  submitted 13 new nonces,  luckFactor=0,82
2012-06-11T06:58:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-4: f=200,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=200,0MH/s,  submitted 10 new nonces,  luckFactor=0,83
2012-06-11T06:58:18: 001-0: ztex_ufm1_15y1-04A36E0711-1: f=216,00MHz,  errorRate=0,22%,  maxErrorRate=0,97%,  hashRate=215,5MH/s,  submitted 17 new nonces,  luckFactor=1,00
2012-06-11T06:58:18: 001-0: ztex_ufm1_15y1-04A36E0711-2: f=220,00MHz,  errorRate=0,46%,  maxErrorRate=0,99%,  hashRate=219,0MH/s,  submitted 12 new nonces,  luckFactor=0,74
2012-06-11T06:58:18: 001-0: ztex_ufm1_15y1-04A36E0711-3: f=216,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=216,0MH/s,  submitted 16 new nonces,  luckFactor=0,90
2012-06-11T06:58:18: 001-0: ztex_ufm1_15y1-04A36E0711-4: f=224,00MHz,  errorRate=0,37%,  maxErrorRate=1,50%,  hashRate=223,2MH/s,  submitted 17 new nonces,  luckFactor=1,09
2012-06-11T06:58:18: 001-0: poll loop time: 188ms (USB: 13ms network: 175ms)   getwork time: 392ms  submit time: 481ms
2012-06-11T06:58:18: Total hash rate: 1512,7 MH/s
2012-06-11T06:58:18: Total submitted hash rate: 1346,3 MH/s
2012-06-11T06:58:18:  -------- 
2012-06-11T06:59:17: New block detected by long polling
2012-06-11T06:59:27: New block detected by long polling
2012-06-11T06:59:36: New block detected by long polling
2012-06-11T06:59:48: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 224,00MHz
2012-06-11T06:59:54: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: Set frequency to 220,00MHz
2012-06-11T07:00:37: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 224,00MHz
2012-06-11T07:00:47: 001-0: ztex_ufm1_15y1-04A36E0711-2: Set frequency to 220,00MHz
2012-06-11T07:01:35: New block detected by long polling
2012-06-11T07:02:05: New block detected by long polling
2012-06-11T07:02:24: New block detected by long polling
2012-06-11T07:03:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-1: f=220,00MHz,  errorRate=0,29%,  maxErrorRate=0,94%,  hashRate=219,4MH/s,  submitted 16 new nonces,  luckFactor=0,92
2012-06-11T07:03:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-2: Error: Hash rate drop of 10,0% detect. This may be caused by overheating. FPGA is shut down to prevent damage.  50.0: Device disabled since 2012-06-11T06:43:14
2012-06-11T07:03:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-3: f=220,00MHz,  errorRate=1,23%,  maxErrorRate=1,91%,  hashRate=217,3MH/s,  submitted 16 new nonces,  luckFactor=0,88
2012-06-11T07:03:18: 001-0: ztex_ufm1_15y1-04A36DE0AA-4: f=200,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=200,0MH/s,  submitted 22 new nonces,  luckFactor=1,01
2012-06-11T07:03:18: 001-0: ztex_ufm1_15y1-04A36E0711-1: f=216,00MHz,  errorRate=0,00%,  maxErrorRate=0,97%,  hashRate=216,0MH/s,  submitted 16 new nonces,  luckFactor=1,01
2012-06-11T07:03:18: 001-0: ztex_ufm1_15y1-04A36E0711-2: f=220,00MHz,  errorRate=0,58%,  maxErrorRate=1,39%,  hashRate=218,7MH/s,  submitted 11 new nonces,  luckFactor=0,74
2012-06-11T07:03:18: 001-0: ztex_ufm1_15y1-04A36E0711-3: f=216,00MHz,  errorRate=0,00%,  maxErrorRate=0,00%,  hashRate=216,0MH/s,  submitted 16 new nonces,  luckFactor=0,94
2012-06-11T07:03:18: 001-0: ztex_ufm1_15y1-04A36E0711-4: f=224,00MHz,  errorRate=0,20%,  maxErrorRate=1,50%,  hashRate=223,6MH/s,  submitted 12 new nonces,  luckFactor=1,01
2012-06-11T07:03:18: 001-0: poll loop time: 151ms (USB: 13ms network: 138ms)   getwork time: 339ms  submit time: 409ms
2012-06-11T07:03:18: Total hash rate: 1510,9 MH/s
2012-06-11T07:03:18: Total submitted hash rate: 1396,9 MH/s
2012-06-11T07:03:18:  -------- 
2012-06-11T07:03:32: New block detected by long polling
2012-06-11T07:03:51: New block detected by long polling

As you see *11 is ok, *AA problematic.
Also just one of the other cores seems to react, but not everytime the same, here its #4, but also I saw #3 and #1 clocking down before.

[ztex]

Just some logging now:
...
As you see *11 is ok, *AA problematic.

The FPGA downclocks immediately because it does not deliver correct results anymore (Its from April batch). The only thing you can try to fix by yourself is to clean the FPGA if you used thermal grease with metal particles (not the one delivered with the cooler). This stuff sometimes disturbs the communication between FPGA and USB controller is it is below the BGA.

If this does not help it hat to be returned for a check.

[ztex]

Set -oh to another value. Try 0.1. This way you can see how low it will fall.

If it is an overheating issue you can use this setting to see how low it fails before the FPGA is killed ...

[Turbor]

Set -oh to another value. Try 0.1. This way you can see how low it will fall.

If it is an overheating issue you can use this setting to see how low it fails before the FPGA is killed ...

Killed in what way ?

[rupy]

I think the whole -oh ratio variable is hard to grasp... could it be "how many frequency jumps per second" or something we can understand professor?

[vv01f]

The FPGA downclocks immediately because it does not deliver correct results anymore (Its from April batch). The only thing you can try to fix by yourself is to clean the FPGA if you used thermal grease with metal particles (not the one delivered with the cooler). This stuff sometimes disturbs the communication between FPGA and USB controller is it is below the BGA.

If this does not help it hat to be returned for a check.

OK, I will try that on Friday - right now I am not close enough to my little rig. Lets hope it is that easy .

[Turbor]

I think the whole -oh ratio variable is hard to grasp... could it be "how many frequency jumps per second" or something we can understand professor?

0.7 equals 70% hashrate drop. 0.6 60% and so far. Base frequency seems to be 200 MHz.

Code:

bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 144.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 148.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 144.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 148.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 144.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-1: Set frequency to 216.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 148.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 140.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 144.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-1: Set frequency to 212.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 140.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 144.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 140.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 136.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 140.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 136.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 132.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 136.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 132.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 128.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 132.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 128.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 124.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 128.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 124.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 120.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 124.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 120.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 116.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 120.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 116.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 112.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 116.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 112.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 116.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 112.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 108.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 112.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 108.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 112.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 108.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 104.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 108.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 104.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 100.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 104.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 100.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 96.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 100.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 96.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 92.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 96.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 92.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 88.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 92.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 88.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 84.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 80.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 76.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 72.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 68.00MHz
bus-0-0: ztex_ufm1_15d4-0001-02-05-1: f=208.00MHz,  errorRate=0.50%,  maxErrorRa
te=1.57%,  hashRate=207.0MH/s,  submitted 13 new nonces,  luckFactor=1.14
bus-0-0: ztex_ufm1_15d4-0001-02-06-1: f=208.00MHz,  errorRate=0.00%,  maxErrorRa
te=0.66%,  hashRate=208.0MH/s,  submitted 8 new nonces,  luckFactor=0.82
bus-0-0: ztex_ufm1_15y1-0001-02-07-1: f=212.00MHz,  errorRate=0.75%,  maxErrorRa
te=0.87%,  hashRate=210.4MH/s,  submitted 12 new nonces,  luckFactor=0.99
bus-0-0: ztex_ufm1_15y1-0001-02-07-2: f=208.00MHz,  errorRate=0.01%,  maxErrorRa
te=0.59%,  hashRate=208.0MH/s,  submitted 16 new nonces,  luckFactor=0.97
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: f=68.00MHz,  submitted 2 new nonces,  luck
Factor=0.96
bus-0-0: ztex_ufm1_15y1-0001-02-07-4: f=204.00MHz,  errorRate=0.06%,  maxErrorRa
te=1.70%,  hashRate=203.9MH/s,  submitted 10 new nonces,  luckFactor=0.71
bus-0-0: poll loop time: 94ms (USB: 6ms network: 88ms)   getwork time: 410ms  su
bmit time: 421ms
bus-0-0: Warning: 2 overflows occured. This is usually caused by a slow network
connection.
Total hash rate: 1105.2 MH/s
Total submitted hash rate: 1020.9 MH/s
 --------
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 64.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-1: Set frequency to 216.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Set frequency to 60.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-3: Error: Hash rate drop of 70.0% detect. Thi
s may be caused by overheating. FPGA is shut down to prevent damage.  50.0: Disa
bling device
bus-0-0: ztex_ufm1_15y1-0001-02-07-1: Set frequency to 212.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-1: Set frequency to 216.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-1: Set frequency to 212.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-2: Set frequency to 212.00MHz
bus-0-0: ztex_ufm1_15y1-0001-02-07-2: Set frequency to 208.00MHz

[Inspector 2211]

Turbor, what you see in your first log is called the "downclock of death" and people, including me, have seen this for a long time. What you see in your second log is just normal behavior.