Garr255
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Activity: 938
Merit: 1000
What's a GPU?
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May 21, 2012, 07:08:52 PM |
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Somebody at BFL just shat his pants.
False, but you did figure out what this is a countdown for
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“First they ignore you, then they laugh at you, then they fight you, then you win.” -- Mahatma Gandhi
Average time between signing on to bitcointalk: Two weeks. Please don't expect responses any faster than that!
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TheSeven
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May 21, 2012, 08:28:34 PM |
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Who are you? Apple or Samsung?
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My tip jar: 13kwqR7B4WcSAJCYJH1eXQcxG5vVUwKAqY
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MrTeal
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Activity: 1274
Merit: 1004
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May 21, 2012, 08:36:05 PM |
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It's just a countdown to his birthday. Cake and grief counseling will be available.
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c_k
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Activity: 242
Merit: 100
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May 21, 2012, 08:38:37 PM |
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I wonder if existing Spartan6 boards people have will require hardware changes for this firmware, like power related circuitry
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Inspector 2211
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May 21, 2012, 09:13:08 PM |
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I wonder if existing Spartan6 boards people have will require hardware changes for this firmware, like power related circuitry
He has already said that the ZTEX boards, including the latest and greatest 1.15y, will draw more power using his 1 1/2 miners (or 3 half-miners) compared to the original 210 MH/s ZTEX bitstream, and since they all have a 8 Amp DC/DC converter, the headroom is small. Just HOW small, I don't know.
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BR0KK
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May 21, 2012, 09:13:53 PM |
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i dont (hope) not than this wouldn't be good for his selling
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c_k
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Activity: 242
Merit: 100
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May 21, 2012, 10:45:51 PM |
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X6500 compatibility is what interests me
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eldentyrell (OP)
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felonious vagrancy, personified
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May 21, 2012, 11:17:56 PM |
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It's probably just counting down to the end of the month in your time zone
Hrm, I specified the time zone in the javascript code, so it should show the same countdown regardless of timezone.
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The printing press heralded the end of the Dark Ages and made the Enlightenment possible, but it took another three centuries before any country managed to put freedom of the press beyond the reach of legislators. So it may take a while before cryptocurrencies are free of the AML-NSA-KYC surveillance plague.
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PatrickHarnett
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May 21, 2012, 11:34:47 PM |
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It's probably just counting down to the end of the month in your time zone
Hrm, I specified the time zone in the javascript code, so it should show the same countdown regardless of timezone. Interested and watching. TargetDate = "5/31/2012 12:00 PM GMT-7"; BackColor = "white"; ForeColor = "black"; CountActive = true; CountStepper = -1; LeadingZero = true; DisplayFormat = "%%D%%d %%H%%:%%M%%:%%S%%.%%SS%%"; FinishMessage = "It is finally here!";
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c_k
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May 21, 2012, 11:55:31 PM |
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It's probably just counting down to the end of the month in your time zone
Hrm, I specified the time zone in the javascript code, so it should show the same countdown regardless of timezone. I was only a guess based on different people having different times. I noticed it stops counting when I go to another window/tab in safari on iOS
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TheSeven
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May 21, 2012, 11:59:26 PM |
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X6500 compatibility is what interests me The x6500 uses regulators that are specified for 10A, and would probably work for 12-15A if there is enough airflow. Actually we've heard reports of a case of a similar regulator surviving around 200% load for days, and that board seemed to run perfectly stable.
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My tip jar: 13kwqR7B4WcSAJCYJH1eXQcxG5vVUwKAqY
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MrTeal
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Activity: 1274
Merit: 1004
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May 22, 2012, 04:29:21 PM |
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That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good).
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sadpandatech
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May 22, 2012, 04:51:22 PM |
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That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good). Very interesting read and if I am reading right they actually achieved 300MHs.. " Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs. "
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If you're not excited by the idea of being an early adopter 'now', then you should come back in three or four years and either tell us "Told you it'd never work!" or join what should, by then, be a much more stable and easier-to-use system. - GA
It is being worked on by smart people. -DamienBlack
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MrTeal
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Activity: 1274
Merit: 1004
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May 22, 2012, 05:09:19 PM |
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That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good). Very interesting read and if I am reading right they actually achieved 300MHs.. " Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs. " Yeah, you're right there. I grabbed the wrong number there. I would love to see independent verification of any of these results. 300MH/s is 50% more than anyone else is currently running. At least with eldentyrell's there's been a long and incremental development time that lends credence to it. 300MH/s is a huge number.
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ngzhang
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May 22, 2012, 05:20:10 PM |
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on the personal front, i suggest stop doing any effort on these pipelined architecture.
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sadpandatech
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May 22, 2012, 05:25:44 PM |
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I would love to see independent verification of any of these results. 300MH/s is 50% more than anyone else is currently running. At least with eldentyrell's there's been a long and incremental development time that lends credence to it. 300MH/s is a huge number.
aye, +100 there. on the personal front, i suggest stop doing any effort on these pipelined architecture.
wha chew talkin' bout, Willis?
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If you're not excited by the idea of being an early adopter 'now', then you should come back in three or four years and either tell us "Told you it'd never work!" or join what should, by then, be a much more stable and easier-to-use system. - GA
It is being worked on by smart people. -DamienBlack
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BTCurious
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May 22, 2012, 05:27:21 PM |
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That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good). Very interesting read and if I am reading right they actually achieved 300MHs.. " Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs. " "One of our test chips worked at 300 Mhz at 1.5 V core, which is significantly above datasheet maximum allowed core voltage." That's 375 MHash/sec
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sadpandatech
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May 22, 2012, 05:32:47 PM |
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That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good). Very interesting read and if I am reading right they actually achieved 300MHs.. " Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs. " "One of our test chips worked at 300 Mhz at 1.5 V core, which is significantly above datasheet maximum allowed core voltage." That's 375 MHash/sec ur math, check it. that would be 468.75MH/s assuming it is linear to the MHZ. And assuming they could cool it enough and the chip could handle the juice to keep error rate low.
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If you're not excited by the idea of being an early adopter 'now', then you should come back in three or four years and either tell us "Told you it'd never work!" or join what should, by then, be a much more stable and easier-to-use system. - GA
It is being worked on by smart people. -DamienBlack
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MrTeal
Legendary
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Activity: 1274
Merit: 1004
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May 22, 2012, 05:36:48 PM |
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That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good). Very interesting read and if I am reading right they actually achieved 300MHs.. " Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs. " "One of our test chips worked at 300 Mhz at 1.5 V core, which is significantly above datasheet maximum allowed core voltage." That's 375 MHash/sec ur math, check it. that would be 468.75MH/s assuming it is linear to the MHZ. And assuming they could cool it enough and the chip could handle the juice to keep error rate low. ? (300MH/s / 240MHz) * 300MHz = 375MH/s
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