Algorithmically placed FPGA miner: 255MH/s/chip, supports all known boards

[sadpandatech]

well, there are definitely some interesting issues to consider.  I for one will be happily running this bitstream on 30+ enterpoint boards...  I would quite imagine making the server as secure and stable as possible would be priority one. I know I would not spend too much time flopping bitstreams on that many units. If the servers are stable I'll be there if not then no biggie, load the next best bitstream and move on with my life....


I ask again, any word on running this on Enterpoint hardware?

[rjk]

well, there are definitely some interesting issues to consider.  I for one will be happily running this bitstream on 30+ enterpoint boards...  I would quite imagine making the server as secure and stable as possible would be priority one. I know I would not spend too much time flopping bitstreams on that many units. If the servers are stable I'll be there if not then no biggie, load the next best bitstream and move on with my life....


I ask again, any word on running this on Enterpoint hardware?

For it to work on existing hardware, the specs for the pinouts and things have to be sent to ET since they all are different. He will then modify the design to fit each hardware platform and run on it. It would probably be best to contact Enterpoint and see whether they have plans to submit their designs to ET for consideration.

[bitlane]

Bitcoin core software = free software
Bitcoin mining software = free software
This bitstream = non-free software built on the backs of free software

That's my problem with it. Without Bitcoin, this bitstream is worthless. But I don't hear eldentyrell splitting his manditory mining-tax with the upstream developers that made this all possible.

How about it eldentyrell? How much of your mining-tax are you sending back upstream to benefit the Bitcoin/Mining developers?

I don't understand why people are getting their panties in a bunch about this.

You have the choice to either USE it or NOT use it.

Considering this improvement is going to increase mining income for everyone who chooses to use it, why can't the developer also increase HIS income ?

As an aside....
Pirate@40 currently generates approx 10% income directly off the backs of everyone who CHOOSES to mine at GPUMAX (when mining shares are sold and public work becomes available, that is).
Using your (skewed at best) reasoning, shouldn't you be praying for HIS downfall ? or perhaps all of the miners that are currently making 20% or greater profits mining, while CHOOSING to use GPUMAX ?
Your 'free software' soap-box spiel applies far more to something such as GPUMAX than it does to the licensing/income model that will be implimented for the OPTIONAL USE of this Bitstream.

Step 1.
CHOOSE

Step 2.
STFU and collect your mining rewards.

Also, as far as a per-FPGA licensing model, for direct sale to end users ?
You can be sure that everyone who decides to purchase (if this retarded pricing model WAS available) would suddenly find themselves only running a FRACTION of the hardware they were prior to purchasing....LMAO
Suddenly, EVERYONE only has but a SINGLE FPGA to purchase the Bitstream license for....LOL

This licensing model is FAIR. As far as another dependency or point of failure (LMAO) The Developer has EVERY incentive to keep his side of the 'operation' running, otherwise, he makes NOTHING.

EVERYONE is here to increase their financial holdings in 1 way or another, so calling the Developer of this bitstream GREEDY is nothing more than the Pot calling the Kettle...well, you know.

Again, CHOICE is a great thing. FTW !

Anyone who cries about this is clearly retarded.

[makomk]

Xilinx guarantees their chips can tolerate operating junction temperatures up to 125°C (see page 2 of DS162) without damage, for all temperature grades (they're manufactured identically, then sorted by testing).

That's the Absolute Maximum Rating. If you look at the footnote it warns: "Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability." So they guarantee it won't die immediately, but not that it won't eventually fail in a few weeks or months as a result of running it out of spec which is what ztex is worried about.

[DiabloD3]

Xilinx guarantees their chips can tolerate operating junction temperatures up to 125°C (see page 2 of DS162) without damage, for all temperature grades (they're manufactured identically, then sorted by testing).

That's the Absolute Maximum Rating. If you look at the footnote it warns: "Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability." So they guarantee it won't die immediately, but not that it won't eventually fail in a few weeks or months as a result of running it out of spec which is what ztex is worried about.

Same goes for GPUs. AMD says their chips will happily run at 100c+, but me and everyone else has been using 85c as the maximum safe 24/7 mining temp.

[SamHa1n]

You mine **% faster only to kill your equipment **% sooner?

[kano]

You mine **% faster only to kill your equipment **% sooner?

Well ... with GPU's there is an advantage if they die in less than 12 months ...

[ztex]

4. I'm concerned about the reliability (due to the 2-year warranty):
...
K/w for the thermal grease leads to a junction temperature of 85°C at 8A

This is misleading; you are fretting about device damage but basing your calculations on the error-free-operation parameters instead of the device-damage parameters.

Xilinx guarantees their chips can tolerate operating junction temperatures up to 125°C (see page 2 of DS162) without damage, for all temperature grades (they're manufactured identically, then sorted by testing).  Using your thermal constants, this means that a CSG484 can handle 26A of current (!) and an FGG484 can handle 20A of current without being damaged (though, of course, the error rate will be 100%).  Anyways, that's plenty of current, even for bitfury.

My concern is not that your bitstream will kill the board immediately. My concern is the reliability over the warranty period of 2 years.  I do not want to get trouble because customers want me to replace 5% to 10% of their boards after two years. This assumption is IMHO not unrealistic at permanent operation at 80° to 90°C junction temperature.

Of course, every one who accepts that risk can use your bitstream.

The second issue I pointed out is the lack of direct or indirect core temperature measurement. There is no way to detect improperly installed heat sinks or fan failure. The algorithm of the BTCMiner which stops the FPGA if the error rate increases would not work with your bitstream because the frequency has to be limited. (And so far this feature saved several FPGA's). An external temperature sensor would not solve this problem because it can only detect fan failure

If you think my concerns are unfounded you can offer to replace/refund FPGA's that fail during usage of your software.

For each temperature grade Xilinx publishes another, lower, limit above which they will not guarantee perfectly error-free operation (85°C for the C-grade devices).  People using FPGAs for bitcoin mining are already far beyond the "guaranteed perfectly error-free" region on other axes like clock frequency.

According to Austin Lessea (of comp.arch.fpga fame; a Principal Engineer at Xilinx) "the device is incredibly robust as far as junction temperature is concerned, and it would have to be at 125C and hotter for a long period to cause damage."

Why they use this odd plastic packages if these FPGA's are also intended for extreme applications (like bitcoin mining)? At 12W the temperature difference between die and heat sink would be about 26°C in CSG484 packages (I use) and 44°C in FGG484 packages (used by other board vendors). IMHO this is not optimal.

[makomk]

For each temperature grade Xilinx publishes another, lower, limit above which they will not guarantee perfectly error-free operation (85°C for the C-grade devices).  People using FPGAs for bitcoin mining are already far beyond the "guaranteed perfectly error-free" region on other axes like clock frequency.

According to Austin Lessea (of comp.arch.fpga fame; a Principal Engineer at Xilinx) "the device is incredibly robust as far as junction temperature is concerned, and it would have to be at 125C and hotter for a long period to cause damage."

Why they use this odd plastic packages if these FPGA's are also intended for extreme applications (like bitcoin mining)? At 12W the temperature difference between die and heat sink would be about 26°C in CSG484 packages (I use) and 44°C in FGG484 packages (used by other board vendors). IMHO this is not optimal.

That quote's from a thread about a Virtex-5 device. As I recall those have metal heatspreaders. So a different chip, different packaging, and built on a different process (65nm rather than 45nm).

[Dhomochevsky]

What about Icarus boards - any chance we'll see a version of the bitstream for them?

[matthewh3]

What about Icarus boards - any chance we'll see a version of the bitstream for them?

I'd like to know when this bitstream will be available for the ModMiner - http://www.btcfpga.com/

[BR0KK]

The guy who sells it announced that already

[matthewh3]

The guy who sells it announced that already

How long until that new bitstream to take the boards to over 1GH/s@50W be ready?

That depends on E.T. and how soon he makes the bitstream available

[rampone]

Oh mighty mighty Tricone Master.
May I humbly request you talking to enterpoint to get the boards specs of their cairnsmore quad fpga board to run your firmware.

Would be awesome!!!

[fizzisist]

What about Icarus boards - any chance we'll see a version of the bitstream for them?

I'd like to know when this bitstream will be available for the ModMiner - http://www.btcfpga.com/

Just FYI, and especially for Dr. Tyrell, the X6500 and ModMiner are fully compatible in terms of bitstreams. Only the host-side protocols are different.

[eldentyrell]

The first bitstream posted will be for ztex boards using a jtag cable (not the Cypress USB thing).  Any jtag cable supported by urjtag will work.

Necessary patch to fix urjtag omission: http://article.gmane.org/gmane.comp.embedded.jtag.urjtag.devel/1288

[Inspector 2211]

The first bitstream posted will be for ztex boards using a jtag cable (not the Cypress USB thing).  Any jtag cable supported by urjtag will work.

Necessary patch to fix urjtag omission: http://article.gmane.org/gmane.comp.embedded.jtag.urjtag.devel/1288

Are the Xilinx-brand JTAG cables supported? None? All? Some? If the latter: Which ones?

I have no experience with urjtag, even though (or maybe because) I sold JTAG hardware myself about a decade ago.

[makomk]

The first bitstream posted will be for ztex boards using a jtag cable (not the Cypress USB thing).  Any jtag cable supported by urjtag will work.

Necessary patch to fix urjtag omission: http://article.gmane.org/gmane.comp.embedded.jtag.urjtag.devel/1288

If you're sending commands to urjtag over a pipe, don't forget to disable urjtag's command history. Otherwise it seems to store every single command sent in RAM for the duration of the session, so its memory use slowly bloats.

Also, I seem to recall there's code out there to emulate the Altera USB Blaster JTAG adapter using a Cypress FX2 like the one on the Ztex board, e.g. http://fpga4u.epfl.ch/wiki/FX2. No idea how practical it'd be to port it though.

[Inspector 2211]

Also, I seem to recall there's code out there to emulate the Altera USB Blaster JTAG adapter using a Cypress FX2 like the one on the Ztex board, e.g. http://fpga4u.epfl.ch/wiki/FX2. No idea how practical it'd be to port it though.

On ZTEX boards, the FPGA's JTAG signals are not even connected to the Cypress FX2 microcontroller.

[eldentyrell]

As of today, such a bitstream change would have to be manually handled.

No.  There is an option to quit the miner if it is unable to contact the signcryption server.  So you launch it from a three-line shell script:


#!/bin/bash
run-tml-miner
run-old-miner


problem solved.

When you submit free patches to all the major mining software packages to support automatic failover to backup bitstreams I will agree with you.

I hereby open-source the above three-line shell script.