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Author Topic: GekkoScience BM1384 Project Development Discussion  (Read 145329 times)
sidehack
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April 21, 2015, 11:29:31 PM
 #501

I laid down plenty of solder in the parts that are going to be handling upward of 10A, especially the parts I want low resistance to keep down ripple voltage. The corner is cut on the regulator board because there's a capacitor on the BM1384 breakout board it needs to accommodate.

I do have a scope, two in fact though one's trigger functoin doesn't work. It's about 30 years old. I have a 50MHz Rigol. I'd like to get a 4-channel one of these days; it'd make the efficiency testing I'm doing right now a lot quicker. I'm having to swap probe pairs to measure each meter board. That does cut down on ground-loop errors though, which is good, but it's certainly not making the task fast.

I have completed 550mV and 575mV curves from 500mA up to about 8.5A out. Now just to get 600-800 in 25mV increments, at 500mA output steps. Something like 160 more data points, each one recording 2 numbers, switching probes, recording two more numbers, then doing 5 calculations on those numbers to get actual current, actual power and efficiency. I might be done today.

Also, the 550mV and 575mV both peaked at just shy of 83% at 3.5A output. If the higher voltages stretch that a bit (say, 86% at 625mV) that could put us pretty close to the goal of 8GH off 2.5W input.

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April 22, 2015, 02:01:38 AM
 #502

I laid down plenty of solder in the parts that are going to be handling upward of 10A, especially the parts I want low resistance to keep down ripple voltage. The corner is cut on the regulator board because there's a capacitor on the BM1384 breakout board it needs to accommodate.

I do have a scope, two in fact though one's trigger functoin doesn't work. It's about 30 years old. I have a 50MHz Rigol. I'd like to get a 4-channel one of these days; it'd make the efficiency testing I'm doing right now a lot quicker. I'm having to swap probe pairs to measure each meter board. That does cut down on ground-loop errors though, which is good, but it's certainly not making the task fast.

I have completed 550mV and 575mV curves from 500mA up to about 8.5A out. Now just to get 600-800 in 25mV increments, at 500mA output steps. Something like 160 more data points, each one recording 2 numbers, switching probes, recording two more numbers, then doing 5 calculations on those numbers to get actual current, actual power and efficiency. I might be done today.

Also, the 550mV and 575mV both peaked at just shy of 83% at 3.5A output. If the higher voltages stretch that a bit (say, 86% at 625mV) that could put us pretty close to the goal of 8GH off 2.5W input.

if you meet the 2.5w to 8gh goal you will be at .3125 watts a gh. pretty nice to see it.

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April 22, 2015, 02:35:10 AM
 #503

Well, I have the regulator marked up to 650mV and 8.9A output. I've used the numbers with some of Bitmain's BM1384 numbers to get some updated extrapolations for performance data. The regulator's not running as efficient as I'd hoped (I was hoping to break 87% peak but the best I saw was 85%). The board-level efficiency data is assuming 100mW toward auxilary stuff, which may be an underestimate.

Actual regulator efficiency data based on this afternoon's measurements:


As you can see, the peak tends to be around 3.5A but efficiency between 3.5 and 8A is still pretty respectable.



This is an extrapolation of expected hashrates versus power required from the USB. Each line is peaked at the rated maximum hashrate for that voltage, as given by Bitmain's chip performance chart, and the power requirement is solved from the regulator input vs output power, Bitmain's chip-level efficiency numbers, and the expected 100mW maintenance power.



This is basically another visualization of the above, with the extrapolated hashrates divided out for board-level hashing efficiency (W/GH). The range is somewhat deceptive, as with the current driver the minimum operating frequency is 100MHz so a minimum hashrate of 5.5GH; it also has a minimum increment of 25MHz, so 1.375GH steps - 5.5, 6.875, 8.25, 9.625, and 11GH for these chart ranges.

We've got a meeting in the morning so I'm not sure when I'll get started on working over the numbers for 675mV through 800mV, but if I can keep getting the performance out of it that I'm seeing so far, I'm definitely going to approve the design and finish putting it in the Compac PCB for prototyping. I'm fairly certain the Compac regulator will be slightly more efficient and/or reliable than this prototype, as I'll be a bit more careful with the layout, and the output will be directly tied to the chip. One thing I noticed when testing was load regulation wasn't so great; going from 500mA to 8A output typically required an increase of 30mV of measured output voltage to stay in range for the measurement. I took my voltage measurement from the regulator board right at the output socket, but the Vsense line on the regulator chip is tied closer to the inductor so it's possible some voltage was dropped in the output trace (though I can't see it being 30mV). The chip actually has a sense pin for GND as well, which was tied locally, so it wasn't taking into account ground-plane drops either. The input voltage to the regulator board was measured below the USB jack, so that does take into consideration any terminal impedance losses and such.

Once I get the regulator marked the rest of the way up, I'll post some updated charts and then rig up a full mockup of the Compac to get actual expected performance data for board-level hashing efficiency. That'll probably take a couple days to get all the data, since for each voltage level there'd be potentially a dozen workable hashrates (and that's if we don't implement my generic clock code so we're stuck on 25MHz increments, min 100MHz) and I'll need to keep a watch on error rates.

Sorry, I don't have any photos of the test rig all set up. Maybe tomorrow. The only additions from already-seen stuff are the jerryrigged FET dummy load and my worked-over scope probes. It is kinda cool to see everything socketed together though.

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April 22, 2015, 02:42:06 AM
 #504

Well, I have the regulator marked up to 650mV and 8.9A output. I've used the numbers with some of Bitmain's BM1384 numbers to get some updated extrapolations for performance data. The regulator's not running as efficient as I'd hoped (I was hoping to break 87% peak but the best I saw was 85%). The board-level efficiency data is assuming 100mW toward auxilary stuff, which may be an underestimate.

Actual regulator efficiency data based on this afternoon's measurements:


As you can see, the peak tends to be around 3.5A but efficiency between 3.5 and 8A is still pretty respectable.



This is an extrapolation of expected hashrates versus power required from the USB. Each line is peaked at the rated maximum hashrate for that voltage, as given by Bitmain's chip performance chart, and the power requirement is solved from the regulator input vs output power, Bitmain's chip-level efficiency numbers, and the expected 100mW maintenance power.



This is basically another visualization of the above, with the extrapolated hashrates divided out for board-level hashing efficiency (W/GH). The range is somewhat deceptive, as with the current driver the minimum operating frequency is 100MHz so a minimum hashrate of 5.5GH; it also has a minimum increment of 25MHz, so 1.375GH steps - 5.5, 6.875, 8.25, 9.625, and 11GH for these chart ranges.

We've got a meeting in the morning so I'm not sure when I'll get started on working over the numbers for 675mV through 800mV, but if I can keep getting the performance out of it that I'm seeing so far, I'm definitely going to approve the design and finish putting it in the Compac PCB for prototyping. I'm fairly certain the Compac regulator will be slightly more efficient and/or reliable than this prototype, as I'll be a bit more careful with the layout, and the output will be directly tied to the chip. One thing I noticed when testing was load regulation wasn't so great; going from 500mA to 8A output typically required an increase of 30mV of measured output voltage to stay in range for the measurement. I took my voltage measurement from the regulator board right at the output socket, but the Vsense line on the regulator chip is tied closer to the inductor so it's possible some voltage was dropped in the output trace (though I can't see it being 30mV). The chip actually has a sense pin for GND as well, which was tied locally, so it wasn't taking into account ground-plane drops either. The input voltage to the regulator board was measured below the USB jack, so that does take into consideration any terminal impedance losses and such.

Once I get the regulator marked the rest of the way up, I'll post some updated charts and then rig up a full mockup of the Compac to get actual expected performance data for board-level hashing efficiency. That'll probably take a couple days to get all the data, since for each voltage level there'd be potentially a dozen workable hashrates (and that's if we don't implement my generic clock code so we're stuck on 25MHz increments, min 100MHz) and I'll need to keep a watch on error rates.

Sorry, I don't have any photos of the test rig all set up. Maybe tomorrow. The only additions from already-seen stuff are the jerryrigged FET dummy load and my worked-over scope probes. It is kinda cool to see everything socketed together though.

thats flexible for a 1 chip usb stick should allow for lesser hubs to do well with underclocks to 6.875gh or 5.5 gh  with better hubs doing 8.25  9.625 maybe squeeze out the top end at 11gh

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April 22, 2015, 02:56:26 AM
 #505

I've already got code written to calculate the PLL hex values for close-to-arbitrary clocks. Software's Novak's job, and if we implement a cgminer driver for these instead of just using the U3 driver already there, we can put that code in it and get about an order of magnitude more granularity in clock setpoints.

Right now it looks like 11GH should be possible on 750-800mA of hub power. That's sturdy, but not difficult.

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April 22, 2015, 03:14:22 AM
 #506

I've already got code written to calculate the PLL hex values for close-to-arbitrary clocks. Software's Novak's job, and if we implement a cgminer driver for these instead of just using the U3 driver already there, we can put that code in it and get about an order of magnitude more granularity in clock setpoints.

Right now it looks like 11GH should be possible on 750-800mA of hub power. That's sturdy, but not difficult.

 This pretty much makes it a perfect stick for me.  My hubs do 900ma per port.

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April 22, 2015, 03:16:57 AM
 #507

If these units don't have a way to provide power from an auxiliary source, then I hope you will put together a tutorial on the proper/correct methods of modifying existing hubs to handle the top end power potentials.
I've seen people suggest all kinds of things from adding crystals to resistors or just plain 16AWG wires over the positive traces.
With no mention of protecting the desktop from being hit with power from the aux. source.
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April 22, 2015, 03:43:28 AM
 #508

It's not difficult, especially if you have a dummy hub without built-in power protection. Cut the 5V trace from the upstream jack, add beefy wire (preferably in a star pattern) from your power input to the 5V pin on each port. Ideally, make sure there's some good buffer caps (470uF or so) near each port. There's surely enough information running around here (and who knows where else on the internet) from the last two years of stickminers being a thing, so I'm not going to gather and encapsulate information that's probably already readily available.

We're definitely going to add power pads to the Amita for running in external 5V at higher current. I haven't decided yet if we'll do that on the Compac, but probably not. Should be able to get around 16GH out of it off the 1.5A the USB jack is rated for, which is pretty toasty. Stock settings for the Amita will probably be in the 800-1000mA range, but it'll probably be built to take up to 2.5-3A if you can keep it cool. That'll be a step for another week, is recalibrating my regulator prototype for 1.2-1.6V output and seeing how well it behaves.

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April 23, 2015, 01:59:44 AM
 #509

So, I ran efficiency lines for 675mV and 700mV today. But it's super boring and I could discern general trends - plus running above 700mV is not "recommended" as at that point you can already push a chip far enough to draw over 1A from the USB. Suffice to say, it appears to work well.

And now the moment you've all been waiting for - actual performance data. The breakout board I used for testing has a bad RF pin so the LED doesn't work properly, but other than that sporadic flashing load (which is probably more than made up for by the LEDs on the USB/UART adapter) I have what should be a pretty accurate mockup of the final Compac circuit running behind my USB meter. Apparently the U3 code in cgminer only recognizes 100-250MHz so that's the range I tested in until we are able to alter the code.



Specified hashrate vs measured power for 600-675mV. Testing above this voltage range was moot, as I could not take the hashrate higher than 250MHz (13.75GH) with the software available.



Here we have a chart of the actual measured W/GH for the Compac. I was surprised but I did get the chip to light up 200MHz (11GH) off 625mV so I'll leave it there for the night and see how it works. This corresponds to 3.52W or 0.32W/GH on the performance data. My ideal stock setpoint, 150MHz 600mV, yielded me 511mA draw which puts it at 2% higher than USB power technically allows. I think the final board should be slightly more efficient which may pull this into acceptable range though 511mA is actually probably good enough. If we're able to adjust the code for arbitrary clocks, 8GH corresponds to 145MHz which should pull about 495MW and I'd just stick it there for defaults.

I did get the chip to start at 150MHz off 595mV, which dropped my current consumption to 504mA as measured. And once started, the running voltage should be adjustable to a bit lower setpoint.

The turn-on current burst for higher frequencies continues to be a killer; I need to adjust the overcurrent limit resistor on the regulator board because when I tried to start 675mV at 200MHz and above it actually dropped out and had to be power-cycled a few times before it survived the burst. I think I saw the bench supply tap 2.4A out briefly, which is pretty toasty.

So yeah, here's the raw data.


600mVGHIinPinW/GH
100MHz5.537218600.34
125MHz6.8844822400.33
150MHz8.2551125550.31
625mV
100MHz5.539019500.35
125MHz6.8846423200.34
150MHz8.2554427200.33
175MHz9.6362031000.32
200MHz1170435200.32
650mV
100MHz5.541020500.37
125MHz6.8849524750.36
150MHz8.2557528750.35
175MHz9.6366033000.34
200MHz1176038000.35
225MHz12.3885042500.34
250MHz13.7594547250.34
675mV
100MHz5.544022000.4
125MHz6.8853026500.39
150MHz8.2561030500.37
175MHz9.6371535750.37
200MHz1181040500.37
225MHz12.3891545750.37
250MHz13.75102051000.37



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April 23, 2015, 02:10:37 AM
 #510

So, I ran efficiency lines for 675mV and 700mV today. But it's super boring and I could discern general trends - plus running above 700mV is not "recommended" as at that point you can already push a chip far enough to draw over 1A from the USB. Suffice to say, it appears to work well.

And now the moment you've all been waiting for - actual performance data. The breakout board I used for testing has a bad RF pin so the LED doesn't work properly, but other than that sporadic flashing load (which is probably more than made up for by the LEDs on the USB/UART adapter) I have what should be a pretty accurate mockup of the final Compac circuit running behind my USB meter. Apparently the U3 code in cgminer only recognizes 100-250MHz so that's the range I tested in until we are able to alter the code.



Specified hashrate vs measured power for 600-675mV. Testing above this voltage range was moot, as I could not take the hashrate higher than 250MHz (13.75GH) with the software available.



Here we have a chart of the actual measured W/GH for the Compac. I was surprised but I did get the chip to light up 200MHz (11GH) off 625mV so I'll leave it there for the night and see how it works. This corresponds to 3.52W or 0.32W/GH on the performance data. My ideal stock setpoint, 150MHz 600mV, yielded me 511mA draw which puts it at 2% higher than USB power technically allows. I think the final board should be slightly more efficient which may pull this into acceptable range though 511mA is actually probably good enough. If we're able to adjust the code for arbitrary clocks, 8GH corresponds to 145MHz which should pull about 495MW and I'd just stick it there for defaults.

I did get the chip to start at 150MHz off 595mV, which dropped my current consumption to 504mA as measured. And once started, the running voltage should be adjustable to a bit lower setpoint.

The turn-on current burst for higher frequencies continues to be a killer; I need to adjust the overcurrent limit resistor on the regulator board because when I tried to start 675mV at 200MHz and above it actually dropped out and had to be power-cycled a few times before it survived the burst. I think I saw the bench supply tap 2.4A out briefly, which is pretty toasty.

So yeah, here's the raw data.


600mVGHIinPinW/GH
100MHz5.537218600.34
125MHz6.8844822400.33
150MHz8.2551125550.31
625mV
100MHz5.539019500.35
125MHz6.8846423200.34
150MHz8.2554427200.33
175MHz9.6362031000.32
200MHz1170435200.32
650mV
100MHz5.541020500.37
125MHz6.8849524750.36
150MHz8.2557528750.35
175MHz9.6366033000.34
200MHz1176038000.35
225MHz12.3885042500.34
250MHz13.7594547250.34
675mV
100MHz5.544022000.4
125MHz6.8853026500.39
150MHz8.2561030500.37
175MHz9.6371535750.37
200MHz1181040500.37
225MHz12.3891545750.37
250MHz13.75102051000.37



 so it looks like you got .32 watts on the best results

  the .625mV  at freq 175Mhz giving 9.63 gh
  the .625mV  at freq 200Mhz giving 11.00 gh

these are really fucking good numbers.  My hubs can handle these really easy as they do .900mV  and you my 4 bridgers i could do 2 chip designs with huge over head.

I am stoked about this gear.  Someone sent a pm telling me you have 600mV at freq 150mHz doing .31 watts  and 8.25 gh   this is better  then I could have ever thought you would do.

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April 23, 2015, 02:36:50 AM
 #511

Yeah, it's pretty much what I was expecting. The Amita numbers should be slightly better, since the regulator will probably be around 90% efficient at 1.2-1.4V and auxilary losses (CP2102, LEDs and such) will be constant per stick, so halved per chip.

Also, 150MHz is 8.25GH, so yes 8.63GH is better than what's possible and whoever told you those numbers is wrong.

Tomorrow my priority will be to finish the Compac PCB design and give it a good once-over. Hopefully we can get those ordered on Friday. If possible I'll draw up a two-chip breakout board so we can test parallel and string better, which will be good for Amita and TypeZero work. While waiting for that stuff, I'll probably shift back to inline regulator design and stuff for the TypeZero. Depending on how much I like the buck chip on the Compac, I may try to build around it for the TypeZero as well.

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April 23, 2015, 03:05:12 AM
 #512

Yeah, it's pretty much what I was expecting. The Amita numbers should be slightly better, since the regulator will probably be around 90% efficient at 1.2-1.4V and auxilary losses (CP2102, LEDs and such) will be constant per stick, so halved per chip.

Also, 150MHz is 8.25GH, so yes 8.63GH is better than what's possible and whoever told you those numbers is wrong.[/img]

Tomorrow my priority will be to finish the Compac PCB design and give it a good once-over. Hopefully we can get those ordered on Friday. If possible I'll draw up a two-chip breakout board so we can test parallel and string better, which will be good for Amita and TypeZero work. While waiting for that stuff, I'll probably shift back to inline regulator design and stuff for the TypeZero. Depending on how much I like the buck chip on the Compac, I may try to build around it for the TypeZero as well.

my lousy eyes skipped a link and blended in

8.25
9.63

getting

8.63

Which is why I skip a line when typing.

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April 23, 2015, 03:09:53 AM
 #513

Nicely done sidehack.  Thanks for all the work.

Love seeing the .3X's on efficiency.  That would make a nice miner Smiley
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April 23, 2015, 03:35:08 AM
 #514

If I can work out strings at those voltages, it means the bottom-end efficiency for the TypeZero should be comparable, if not better.

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April 23, 2015, 03:59:00 AM
 #515

If I can work out strings at those voltages, it means the bottom-end efficiency for the TypeZero should be comparable, if not better.

Don't play with my emotions.
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April 23, 2015, 05:35:29 AM
 #516

If I can work out strings at those voltages, it means the bottom-end efficiency for the TypeZero should be comparable, if not better.

Please have my bitcoin babies if you're telling me we can push about half the w/gh compared to current miners. That's like 40% better and it is beautiful

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April 23, 2015, 02:58:28 PM
 #517

Bitmain could probably do it if they wanted, but with a fixed-voltage string it comes down to balancing high hashrate versus chip density. When I first ran the numbers for a potential S2 upgrade kit I was eyeballing something like 3.5TH off 1KW with 100W blades, but their prototype was more like 2.4TH off 6 blades at about 700W probably because you could do it with a lot fewer chips. To get low power means clocking the chips at their bottom end, and to get high hashrate at bottom clock means a jillion chips.

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April 23, 2015, 04:36:54 PM
 #518

I wonder if perhaps since the S5 was originally introduced, the balance of more slower clocked chips has shifted. By now, you would expect that the yields on BM1384 parts is pretty good. That usually drives down the cost of the chips. At the outset though, perhaps the chip costs were expected to be higher so it made more sense to have fewer, faster clocked parts. Of course their view of costs and margins are probably wildly different than sidehack's.
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April 23, 2015, 07:02:09 PM
 #519

I wonder if perhaps since the S5 was originally introduced, the balance of more slower clocked chips has shifted. By now, you would expect that the yields on BM1384 parts is pretty good. That usually drives down the cost of the chips. At the outset though, perhaps the chip costs were expected to be higher so it made more sense to have fewer, faster clocked parts. Of course their view of costs and margins are probably wildly different than sidehack's.

this is a good point  2 guys with 2 helpers build :

1000 1 chip usb sticks  
500   2 chip usb sticks
200  10 chip boards


that may be all of sidehack's production over the next month.

If bitmaintech was doing them

that would be 1 days production.

Completely different set of cost accounting for the same builds and same chips due to 30x the volume.


To others reading the above is a fictional estimate not based on anything but a guess.

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April 23, 2015, 07:10:24 PM
 #520

So, got some new charts for y'all.



I got to thinking about some of the design choices on the regulator, specifically FETs and operating frequency. I'd been working around 600KHz previously, and the new buck driver had stock setpoints at 500KHz and 670KHz so I opted for 670. Going up in frequency keeps inductor ripple current low, which keeps output voltage ripple low with a given output capacitor ESR. It does, however, introduce increased losses from gate drive switching. So I figured I'd test at 500KHz (where the inductor ripple was still pretty reasonable) and I saw an increased efficiency.
Then I got to looking at the FET transition times compared with the dead times from the controller. If your rise and fall times are long, this increases conduction losses from operating in the linear region (between full-off and full-on). If the delay times are too long, you can get shoot-through losses when both FETs are temporarily on. The FETs we had spec'd for our Chuckwagon project had better transition times, though the delay times weren't that much better. They also had a slightly lower Rdson, which is to say the on-state resistance. The power losses in the top FET, since it's only on about 15% of the time, are dominated by switching losses. The bottom FET, however, is on the other 85% of the time so its conduction losses (resistive losses, current squared times Rdson) dominate the switching losses. The Chuckwagon FETs have a higher gate charge, which increases switching losses in the top FET, but between the lower shoot-through losses and the lower conduction losses in both the top and bottom FETs, I still saw a net efficiency gain over the original FETs at 500KHz. A side benefit was, for some reason the output noise was much better. Possibly this is because of reduced switching noise or shoot-through currents, but the output was cleaner even than all of my tests with the first regulator design (the IR3899). So, it adds about a quarter to the total cost to use the different FETs but I'm pretty sure the benefits outweigh the costs.

Especially when I can operate it at 606mV 150MHz 8.25GH/s with 500mA draw on the port.





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