[ActiveMining] The Official Active Mining Discussion Thread [Self-Moderated]

[Thumper650]

1. Hi, here's the quote, including both Intellihash and the respin (sorry, it was me that misremembered "respin" - i guess i was trying to reconcile stuff subconsciously, the original is simply ridiculous):

Intellihash(tm)

Intellihash is our new trademark for our new Bitcoin mining software which gives up to a 20% increase in hashing speed and has the possibility to increase the speed of our mining machines as the difficulty goes up.  We have had to modify the software in our chips to make it work with our new software.  The chips are going to be late; however, our new Intellihash software could be a game changer for the company.

link: https://bitcointalk.org/index.php?topic=297543.msg3782916#msg3782916

"modify the software in our chips to work with our software"?  So you can mine while you mine?

Like I said, wouldnt count on Ken using the correct terminology .

1.  But there could be some truth to this apparently nonsensical statement; FPGA's do run microcode ('software'). 'our chips' would then have to be referring to FPGA's still. That may sound disastrous that at that point they would still be working on the FPGA prototype, but do keep in mind eASIC nextreme works differently than traditional asics. It uses standard partially processed wafers on which just one layer is changed, and this can be done using an e-Beam; that would be done in house and could be done very fast (within hours literally I believe, but lets call it days).

So here is one hypothesis:
- Nextreme 3 preprocessed wafers are not ready yet or are having issues and they need a respin. Ken may not be allowed to say this publicly.
- meanwhile work is continuing on the ActM FPGA code, changes are made to implement whatever "intellihash" means

The bringing together of those 2 can be done very much faster than with traditional asics, at least for low volume production; its pretty much impossible to guess their timeline, but once working nextreme 3 wafers get delivered, it could be only a matter of days to implement the FPGA code and get working ActM chips (well, wafers) based on them.

2. If the contract with eAsic was for Ken to be a guinea pig, he simply lied to his investors by misrepresenting the risks.  There's a guy here who invested his retirement fund into this disaster.  

2. I dont quite see how anyone could have thought a startup company producing bitcoin specific hardware could be risk free. FWIW, KnC is also not telling its Neptune customers its using a brand new, barely tested 20nm process, the equipment for which is still being ordered by TSMC. That may or may not pan out, but TBH, I would rate that higher risk than I would have rated eASIC's ability to bring a well understood structured asic migration process to a well understood mature silicon production process. If I were Ken, I would probably have made that same bet.

1.  Well sure.  Every lie has a great deal of truth.  It's the doping of untruth that makes it a lie.
The stage of development you are describing - tweaking FPGA code - is the very *first* stage of ASIC development.  This was assumed done ages ago.  E-beam process, for those who don't know it, is analogous to handwriting a book vs. printing it using a mask.  The expense is analogous.  16GH/sec chips, if 16GH/sec could indeed be produced using this process, would be more expensive than buying competitor's chips retail.

Which brings us to Intellihash.
"We will be introducing our Fast-Hash One Smart Edition and will have an upgrade path for our current customers."
So there are existing customers, who will be able to upgrade to Intellihash technology?  What chips is the Fast-Hash One Dumb Edition using?

2.  We are not talking about the inherent risks of silicon design, but rather Ken's intentional misrepresentation of the risks taken on by Active Mining.
I will outline these risks:
An illiterate CEO who doesn't know a thing about silicon design and is unable to communicate (you pointed this out, we agree).
A non-contract with eAsic to be a "guinea pig," to use your language.

If I offered you a spaceship to take you to Mars, took your money, and made an earnest effort to build one from my trash bin and some Home Depot lumber, that's called a scam, not incompetence.
A well-structured scam could never be proven a scam with mathematical certainty - that's what allows scams to exist.  A scam that could be proven instantly becomes a *failed* scam.  This one's clumsy, but surprisingly successful.

[zumzero]

Anybody knows what the fate of non-tendered shares stored on BF is? Thx.

Hi hammu,

My understanding is that you are good with your non-tendered shares from BF.  The concept is; you will be contacted via email as soon as shares are ready to go live, very probably from Crypto-Trade, the anticipated centralised exchange based in Hong Kong who will create a trading account for you which will contain your shares.  You will be expected to be able to prove ownership by 'signing a message' using your bitcoin address that you used in BF where you expected to receive dividends from ActM.
Find that address and you are safe, as that is all any of us have to prove ownership as it stands currently.  

Just ask away if you need more info.  

So here's the but (edit).  It is believed by many that it is likely that Ken Slaughter may be opting for a safer and more permanent solution in the form of Coloured Coins, the decentralised solution, although Ken recently stated that both would be an option.  If that turns out to be the case, then  simply monitor this thread for developments as we are all doing.

Edit 2:  My advice is you log in to BF and take a screen grab of all of your transactions as well as the page which displays your bitcoin address.  NEOBEE kindly took charge of that website so that people could retrieve their records.

[Puppet]

1.  Well sure.  Every lie has a great deal of truth.  It's the doping of untruth that makes it a lie.
The stage of development you are describing - tweaking FPGA code - is the very *first* stage of ASIC development.  This was assumed done ages ago.

And it may have been done ages ago. But when the nextreme 3 wafers (or asics?) came back and proved not working (assuming anything came back), it might have been decided to take the opportunity to tweak the code while waiting for the new spin of nextreme wafers.

 E-beam process, for those who don't know it, is analogous to handwriting a book vs. printing it using a mask.  The expense is analogous.  16GH/sec chips, if 16GH/sec could indeed be produced using this process, would be more expensive than buying competitor's chips retail.

e-beam is more expensive, but the difference isnt quite as large as you suggest for low volume productions. In fact for volumes under 100K, its probably cheaper. Moreover, Im assuming that would only be used for the first lot because it can be done so fast. Once the chip and PCB is validated, a photomask can be made for the top layer(s) and the chips produced in a way thats much more comparable to traditional asics, while still allowing a faster turn around since you are only etching one or two metal layers on to prefabricated wafers. There is still a price penalty compared to a full mask asic, but I would expect those chips to be competitive for quite some time.


edit: read this (rather dated) press release by easic, which rhymes completely with my hypothesis:
http://www.easic.com/easic-introduces-a-maskless-customization-approach-for/

2.  We are not talking about the inherent risks of silicon design, but rather Ken's intentional misrepresentation of the risks taken on by Active Mining.
I will outline these risks:
An illiterate CEO who doesn't know a thing about silicon design and is unable to communicate (you pointed this out, we agree).
A non-contract with eAsic to be a "guinea pig," to use your language.

There is nothing inherently wrong with being a guinea pig. Especially not if you can't see compelling reasons why it would fail. Frankly, Im stunned eASIC still doesnt seem to have nextreme 3 ready. Where you predicting this back in September? If so, I must have missed that.

[Thumper650]

1.  Well sure.  Every lie has a great deal of truth.  It's the doping of untruth that makes it a lie.
The stage of development you are describing - tweaking FPGA code - is the very *first* stage of ASIC development.  This was assumed done ages ago.

And it may have been done ages ago. But when the nextreme 3 wafers (or asics?) came back and proved not working (assuming anything came back), it might have been decided to take the opportunity to tweak the code while waiting for the new spin of nextreme wafers.

If it was done ages ago, and "It uses standard partially processed wafers on which just one layer is changed, and this can be done using an e-Beam; that would be done in house and could be done very fast (within hours literally I believe, but lets call it days)." why did the respin not happen ages ago?  This is getting a bit forced.

 E-beam process, for those who don't know it, is analogous to handwriting a book vs. printing it using a mask.  The expense is analogous.  16GH/sec chips, if 16GH/sec could indeed be produced using this process, would be more expensive than buying competitor's chips retail.

e-beam is more expensive, but the difference isnt quite as large as you suggest for low volume productions. In fact for volumes under 100K, its probably cheaper. Moreover, Im assuming that would only be used for the first lot because it can be done so fast. Once the chip and PCB is validated, a photomask can be made for the top layer(s) and the chips produced in a way thats much more comparable to traditional asics, while still allowing a faster turn around since you are only etching one or two metal layers on to prefabricated wafers. There is still a price penalty compared to a full mask asic, but I would expect those chips to be competitive for quite some time.

Obviously e-beam is very much slower than traditional lithography, see my comment above.  You are also making unreasonable assumptions about nextreme 3 which, according to you, is still in development.  Do you have any data to substantiate your assumptions?

2.  We are not talking about the inherent risks of silicon design, but rather Ken's intentional misrepresentation of the risks taken on by Active Mining.
I will outline these risks:
An illiterate CEO who doesn't know a thing about silicon design and is unable to communicate (you pointed this out, we agree).
A non-contract with eAsic to be a "guinea pig," to use your language.

There is nothing inherently wrong with being a guinea pig. Especially not if you can't see compelling reasons why it would fail. Frankly, Im stunned eASIC still doesnt seem to have nextreme 3 ready. Where you predicting this back in September? If so, I must have missed that.

There is nothing inherently wrong with being a guinea pig if you tell your investors that's what you are doing.  If Ken stated that, I would have no problem with it.
If he made it clear that he was an illiterate with no silicon design skills, handing the money over to a company that would use it to fund an experiment, I doubt this Virtual Identity would have been such a raving success.  He didn't.  Millions were "invested."

My account is about 2 weeks old, which makes it unlikely that I would have been making any predictions back in September.  If you wish to entertain hypotheticals, I would point out that had i been in a contractual relationship with eAsic as Ken allegedly was, I would be able to discuss this particular fail with a bit more verve.  As it stands, the myriads of red flags were enough for most to call this a scam with 99% certainty.  Whether this is a true scam or simply incompetence taken to its pinnacle is an irrelevant technicality.  

[zumzero]

I'd also like to extend my appreciation that someone with a technical understanding is here and sharing in what appears to be an unbiased and impartial way and it's nice to see crumbs have a civil conversation with someone.  

[VinceSamios]

Kens Linkedin has an endorsement from the sales director of Stilwell Baker Inc... I guess we're reasonably confident these were the first PCB engineers then? I thought they were super reliable?

[Puppet]

If it was done ages ago, and "It uses standard partially processed wafers on which just one layer is changed, and this can be done using an e-Beam; that would be done in house and could be done very fast (within hours literally I believe, but lets call it days)." why did the respin not happen ages ago?  This is getting a bit forced.

Obviously e-beam is very much slower than traditional lithography, see my comment above.  You are also making unreasonable assumptions about nextreme 3 which, according to you, is still in development.

Read my edit, this explains how it works:
http://www.easic.com/easic-introduces-a-maskless-customization-approach-for/

You dont use the ebeam to etch the entire chip, only a few via's on one layer. The prefabricated wafer is a lot like an FPGA, with the ebeam burning your bitstream. But those wafers are what makes Nextreme 3 what it is, and since eASIC still not advertising that process, only their 90 and 45nm nextreme implementations,  thats all the evidence I need to know its not ready yet.

Im not here to defend Ken or ActM in general, I have no opinion on the rest of his business, but I will say the strategy of going with eASIC structured asic was a good one. Even if on hindsight it appears to be causing delays.

[Stuartuk]

So all the shit Ken has had to put up with on here for the past 3months could well be due to apparently reliable and reputable big name suppliers and contractors letting him (and us) down. It's wouldn't surprise me. I mean it looks like Ken has 'hired the ''best'' to a greater or lesser extent. It's not like he is knocking these chips and boards out in his garage - he has paid others to do that work for him and paid them a lot of money it seems.

I think we need to start giving Ken the benefit of the doubt and think about who might have let us down with these delays. We can't put anyone against a wall and shoot them but atleast we can not lay all of this on Ken's shoulders. There is more involved in any businesses success than the choices made by the CEO. The CEO can hire in good faith, with supporting references, and still be let down.
 

[Thumper650]

If it was done ages ago, and "It uses standard partially processed wafers on which just one layer is changed, and this can be done using an e-Beam; that would be done in house and could be done very fast (within hours literally I believe, but lets call it days)." why did the respin not happen ages ago?  This is getting a bit forced.

Obviously e-beam is very much slower than traditional lithography, see my comment above.  You are also making unreasonable assumptions about nextreme 3 which, according to you, is still in development.

Read my edit, this explains how it works:
http://www.easic.com/easic-introduces-a-maskless-customization-approach-for/

You dont use the ebeam to etch the entire chip, only a few via's on one layer. The prefabricated wafer is a lot like an FPGA, with the ebeam burning your bitstream. But those wafers are what makes Nextreme 3 what it is, and since eASIC still not advertising that process, only their 90 and 45nm nextreme implementations,  thats all the evidence I need to know its not ready yet.

Im not here to defend Ken or ActM in general, I have no opinion on the rest of his business, but I will say the strategy of going with eASIC structured asic was a good one. Even if on hindsight it appears to be causing delays.

I'm not arguing that going with eAsic was unreasonable, and i understand the e-beam process at a conceptual level (here's a pretty accessible write-up), but even eAsic's publicity blurb promises only an order of magnitude improvement over FPGAs:
"eASIC is the only company that can offer ASIC without NRE cost. Although FPGAs do not require NRE either, their per-unit cost is significantly higher than ASIC’s and their performance is lower by about an order of magnitude."
That's not nearly enough to compete with today's mining ASICs.

If the Nextreme 3 process is not ready (which I readily grant), guessing its cost, gate density & time to market is simply that - guessing.  Thus far, we know nothing about the cost (Ken didn't say), gate density (NDA), while time to market is currently abysmal.
Would I have chosen to go with Nextreme 3, abandoning allegedly existing previous designs?  Would I have chosen an unproven process, obviously in early stages of development, over the 90 & 45nm implementations, when time to market is such a heavily weighed variable?  I can't tell you without talking with eAsic.
But then I didn't promise anyone a thing, and I didn't take any money.

[bitwhizz]

can someone tell me whats going , i have stock. and havnt followed up in months, a quick breakdown of events would be nice

[deizel]

Wow Puppet, thank you so much for chiming in. Finally someone who brings both chip knowledge and common sense to this thread.

Im hardly an expert, but Ive considered the structured asic approach for a long time myself. It made complete sense a year ago, since it allows close to asic performance with comparatively low NRE, much lower risk and in theory (on an established process), much faster time to market. However, if its true ActM collected $10M, that choice becomes more questionable. And for sure the clock is ticking, the disadvantages of a structured asic cant be ignored in the face of mounting competition; they are less power efficient (color me skeptical about the claims made in that regard) and they cost a lot more per chip. IF its going to happen it had better happen soon, because obsolesce is looming around the corner.

Don't forget about the easicopy ASIC migration (which seems like an obvious next step assuming it's ready for nextreme 3):

When initial customer successes transition to very high volume production, easicopy ASICs provide OEMs the choice to further reduce cost, power consumption and increase performance via a cell-based ASIC migration.

[Thumper650]

...The CEO can hire in good faith, with supporting references, and still be let down.

He hired the best chip designers.  They failed.
He hired the best PC board designers.  Those failed too.
He hired the best marketers.  Lol, no.
He hired the best PR team.  Nah, he didnt.
He added two benches to his empty warehouse.
Stellar.

@bitwhizz: Sorry.

[Vigil]

can someone tell me whats going , i have stock. and havnt followed up in months, a quick breakdown of events would be nice

You will never get your stock back, you are a perpetual bag-holder. You should have sold your stock prior to the share transfer if you ever wanted to see your bitcoins again.

[Stuartuk]

can someone tell me whats going , i have stock. and havnt followed up in months, a quick breakdown of events would be nice

The chips and boards are delayed. Estimates 4-8wks.
We are awaiting implementation of a new trading platform - probably Coloured Coins and/or Crypto-Trade.

That's it.

[Vigil]

can someone tell me whats going , i have stock. and havnt followed up in months, a quick breakdown of events would be nice

The chips and boards are delayed. Estimates 4-8wks.
We are awaiting implementation of a new trading platform - probably Coloured Coins and/or Crypto-Trade.

That's it.

This is an assumption and a massive extrapolation based on what Ken said. We have no way to know that anything is going on at all. Ken and Co. could be secretly mining in the underground facility for all we know or there may never have been a successful RTL submitted to eASIC. There is just no way to know as we have not fact one.

[zumzero]

Then why oh why perpetuate the myth that all is lost?

Edit: It would appear that crumbs has also shaken off his nemesis and used X as an escape mechanism.

I refer you all to; https://bitcointalk.org/index.php?topic=405950.0

"A man of many words perhaps has an equal number of profiles?"

[VinceSamios]

Then why oh why perpetuate the myth that all is lost?

Edit: It would appear that crumbs has also shaken off his nemesis and used X as an escape mechanism.

I refer you all to; https://bitcointalk.org/index.php?topic=405950.0

There is atleast one posted on this thread that is being paid to cause shit... It's proving to be very effective.

[zumzero]

An understatement at best. 

Now watch crumbs flame for his life..

[zumzero]

...The CEO can hire in good faith, with supporting references, and still be let down.

He hired the best chip designers.  They failed.
He hired the best PC board designers.  Those failed too.
He hired the best marketers.  Lol, no.
He hired the best PR team.  Nah, he didnt.
He added two benches to his empty warehouse.
Stellar.

@bitwhizz: Sorry.

Totally backed into a corner therefore this response was inevitable and sadly telling.

Edit:  I'm not particularly delighted it turned out this way, but please read that thread I posted.  Crumbs is having a conversation with the mods and goes by the moniker AccountUnlimited as one side of his many faces.  There is nothing new in that, but what is good is that the mods allow such freedom of speech.  The website even prepares us for this when they talk about not censoring scams.  That allows me my freedom to say this, "Today Crumbs has shown his cards.  He tripped and fell down our rabbit hole.  He is so knowledgeable in all things ASIC that his basement dwelling, cat loving persona does not fly anymore, not here."

[Puppet]

That's not nearly enough to compete with today's mining ASICs.

Thats a very general number and FWIW, applies to a 10 year old process without even mentioning what FPGA they are comparing to. Performance improvements from FPGA to structured asic or even asic ranges enormously depending on application. Ive seen numbers from 2x to 100x, so  I wouldnt read much in to that. 16 GH per chip is what they claim, as well as ~1GH/J, Im sure eASIC didnt just come up with those numbers based on nothing. What remains to be seen is how big that chip is, but to be economically unprofitable in the coming months, it would have to be frigging huge.  Considering the stated power efficiency, that seems unlikely.

Anyway, at this point I cant draw conclusions. If my assumption is correct, then it all depends on how fast eASIC can make nextreme 3 work and produce these wafers. That could be weeks or months from here, I have no idea. Ken probably does have an idea, but Im sure he is not allowed to talk. Whats left is waiting I guess.