Official Open Source FPGA Bitcoin Miner (Last Update: April 14th, 2013)

[razorfishsl]

Check the version number on the FPGA.
you can do it by reading the chip ID.

I have found a MASSIVE difference in power/heat & speed using the SAME part numbers and specs and bitfiles, but on reading the internal chip details the FPGA's have different revision numbers.......

Just wondering if Xilinx lets very high grade parts thru as lower grade when they are running short.....

[kingcoin]

Just wondering if Xilinx lets very high grade parts thru as lower grade when they are running short.....

They all do. The yield will in most cases improve as the process and tooling matures. They don't de-tune the process to produce slower parts. As for "Easypath" they might end up selling perfect devices as discounted defective devices.

[goxed]

Okay I tried the 600MH/s bitstream on a second Kintex-7 325T device and the temps are 70C. For the record in the same environment the other Kintex-7 325 chip  hovers at 30 - 35C in the same setting.
 So I pretty much guess Xilinx is downselling some of the higher performing chips which can be good if these chips are bought in bulk and can be user-binned.

[gingernuts]

Okay I tried the 600MH/s bitstream on a second Kintex-7 325T device and the temps are 70C. For the record in the same environment the other Kintex-7 325 chip  hovers at 30 - 35C in the same setting.
 So I pretty much guess Xilinx is downselling some of the higher performing chips which can be good if these chips are bought in bulk and can be user-binned.

I don't suppose you know whether one of those chips is an engineering sample - it'll have ES as part of the speed grade?

 My guess is that one of those two chips has a duff temp sensor or XADC - I can't believe they are selling chips with 2x the power consumption randomly! I guess you'd need to be able to monitor the core-current to actually know what the power really is!

[goxed]

I will hook up a Kill-a-Watt and check both the boards with the same bitstream.
 It is a proxy, but not perfect measurement for power differences.

[goxed]

I have a question regarding fpga mining on the 7K325T FPGA. Is there a project / bitstream which can mine at or greater than 1GH/s on this FPGA?

[senseless]

I have a question regarding fpga mining on the 7K325T FPGA. Is there a project / bitstream which can mine at or greater than 1GH/s on this FPGA?

I was able to achieve 1Gh/s (5 cores @ 200mhz w/ +0.1 timing) but not using fpgaminer's code and the code wasn't complete (didnt actually hash, comm wasn't migrated), but yes it is possible. I was able to achieve 450Mh/s on the A7 200.

It should be possible to get 1.2Gh/s out of the K7 and probably around 600 with the A7 (If you give it a little bit of help on the fit.)

[goxed]

I have a question regarding fpga mining on the 7K325T FPGA. Is there a project / bitstream which can mine at or greater than 1GH/s on this FPGA?

I was able to achieve 1Gh/s (5 cores @ 200mhz w/ +0.1 timing) but not using fpgaminer's code and the code wasn't complete (didnt actually hash, comm wasn't migrated), but yes it is possible. I was able to achieve 450Mh/s on the A7 200.

It should be possible to get 1.2Gh/s out of the K7 and probably around 600 with the A7 (If you give it a little bit of help on the fit.)

Can you please point me to the hashing code that you used? I want to program my 7K325  on KC705 board with that code and check its performance. Thanks

[fpgaminer]

Okay I tried the 600MH/s bitstream on a second Kintex-7 325T device and the temps are 70C. For the record in the same environment the other Kintex-7 325 chip  hovers at 30 - 35C in the same setting.

For curosity's sake, you could measure the heatsink's temperature.  If both heatsinks are the same temp, it's likely your "special" FPGA either has a broken temp sensor (as gingernuts mentioned), or perhaps calibration is off (I think those sensors can be calibrated?).  If the temps are drastically different ... well ... I guess you won the FPGA lottery

[asjfdlksfd]

I was able to achieve 1Gh/s (5 cores @ 200mhz w/ +0.1 timing) but not using fpgaminer's code and the code wasn't complete (didnt actually hash, comm wasn't migrated), but yes it is possible. I was able to achieve 450Mh/s on the A7 200.

It should be possible to get 1.2Gh/s out of the K7 and probably around 600 with the A7 (If you give it a little bit of help on the fit.)

Do you like to share the code?

[Ascendion]

I've been asked to look into the feasibility of packing a core on to an XC3S50 and wanted to ask here before diving into trying to synth it myself. From what I've seen in the repo and this thread that device is probably far too small even for a tightly rolled hasher, but I'd like to hear it from the experts It doesn't matter how many cycles it takes per hash, just asking if it can be made to fit at all period. The person I'm asking for has some 500 of these chips sitting in a box

[senseless]

Can you please point me to the hashing code that you used? I want to program my 7K325  on KC705 board with that code and check its performance. Thanks

It was the OrphanGland stratix IV code ported over to the K7. We were planning on making an FPGA device but the power utilization vs hash vs cost figures weren't as close to the avalon figures as we had hoped.

[goxed]

Can you please point me to the hashing code that you used? I want to program my 7K325  on KC705 board with that code and check its performance. Thanks

It was the OrphanGland stratix IV code ported over to the K7. We were planning on making an FPGA device but the power utilization vs hash vs cost figures weren't as close to the avalon figures as we had hoped.

Is that code the same on fpgaminer's github project or is there another link? Any link would be great. Thanks!

[goxed]

Okay I tried the 600MH/s bitstream on a second Kintex-7 325T device and the temps are 70C. For the record in the same environment the other Kintex-7 325 chip  hovers at 30 - 35C in the same setting.

For curosity's sake, you could measure the heatsink's temperature.  If both heatsinks are the same temp, it's likely your "special" FPGA either has a broken temp sensor (as gingernuts mentioned), or perhaps calibration is off (I think those sensors can be calibrated?).  If the temps are drastically different ... well ... I guess you won the FPGA lottery

Don't own a thermometer. Any other method that comes to mind?
 Most likely it's a calibration issue. Will plug it in a Kill-a-Watt first to get any anecdotal evidence (power consumption differences)

[senseless]

Can you please point me to the hashing code that you used? I want to program my 7K325  on KC705 board with that code and check its performance. Thanks

It was the OrphanGland stratix IV code ported over to the K7. We were planning on making an FPGA device but the power utilization vs hash vs cost figures weren't as close to the avalon figures as we had hoped.

Is that code the same on fpgaminer's github project or is there another link? Any link would be great. Thanks!

https://github.com/progranism/Open-Source-FPGA-Bitcoin-Miner/tree/master/projects/VHDL_StratixIV_OrphanedGland

The port was pretty basic it was just to get it to compile and display correct timings during analysis.

[goxed]

Okay I tried the 600MH/s bitstream on a second Kintex-7 325T device and the temps are 70C. For the record in the same environment the other Kintex-7 325 chip  hovers at 30 - 35C in the same setting.

For curosity's sake, you could measure the heatsink's temperature.  If both heatsinks are the same temp, it's likely your "special" FPGA either has a broken temp sensor (as gingernuts mentioned), or perhaps calibration is off (I think those sensors can be calibrated?).  If the temps are drastically different ... well ... I guess you won the FPGA lottery

Don't own a thermometer. Any other method that comes to mind?
 Most likely it's a calibration issue. Will plug it in a Kill-a-Watt first to get any anecdotal evidence (power consumption differences)

Power consumption is same for both FPGA boards at 45Watts, 600MH/s.

 The one that shows lower temp probably has a poorly calibrated temp sensor. Reported temps are around 1/2 of the actual temp.

So this info solves this small mystery.

[teknohog]

I've got the DE2-115 miner working with cgminer:

https://github.com/teknohog/Open-Source-FPGA-Bitcoin-Miner/tree/master/projects/DE2_115_makomk_serial_109mhz_cgminer

I can do this for any project that uses my serial mining code. The reason is, as I only recently learned, that Icarus was based on my serial mining cluster project. There was only a small change in my protocol to facilitate Stratum etc:

http://en.qi-hardware.com/wiki/Icarus#Communication_protocol_V3

so I updated my code accordingly (from the spec, not Icarus code). Now the device can use the Icarus driver in cgminer, at least when timings etc. are set accordingly.

For some reason, I can only get this to work with cgminer version 3.1.1. Perhaps it's due to a quirky USB-serial converter -- I'll test with other hardware later.

[goxed]

I've got the DE2-115 miner working with cgminer:

https://github.com/teknohog/Open-Source-FPGA-Bitcoin-Miner/tree/master/projects/DE2_115_makomk_serial_109mhz_cgminer

I can do this for any project that uses my serial mining code. The reason is, as I only recently learned, that Icarus was based on my serial mining cluster project. There was only a small change in my protocol to facilitate Stratum etc:

http://en.qi-hardware.com/wiki/Icarus#Communication_protocol_V3

so I updated my code accordingly (from the spec, not Icarus code). Now the device can use the Icarus driver in cgminer, at least when timings etc. are set accordingly.

For some reason, I can only get this to work with cgminer version 3.1.1. Perhaps it's due to a quirky USB-serial converter -- I'll test with other hardware later.

Can you share the source code for the comm module? I will try to add it to the KC705 / Kintex-7 comm code.

[teknohog]

https://github.com/teknohog/Open-Source-FPGA-Bitcoin-Miner/tree/master/projects/DE2_115_makomk_serial_109mhz_cgminer

Can you share the source code for the comm module? I will try to add it to the KC705 / Kintex-7 comm code.

It's all there in serial.v and fpgaminer_top.v. Read the spec too for an overview.

Edit: now using UART code from KC705_experimental.

[goxed]

https://github.com/teknohog/Open-Source-FPGA-Bitcoin-Miner/tree/master/projects/DE2_115_makomk_serial_109mhz_cgminer

Can you share the source code for the comm module? I will try to add it to the KC705 / Kintex-7 comm code.

It's all there in serial.v and fpgaminer_top.v. Read the spec too for an overview. I cannot share all of the RS232 code, since I use an external set of files which you can download from fpga4fun, as linked.

Great thanks!