zawawa (OP)
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February 21, 2017, 09:33:21 PM |
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All the joking aside, I was able to run SA's kernel with alloca promotion enabled with the following modifications: static bool isCallPromotable(CallInst *CI) { IntrinsicInst *II = dyn_cast<IntrinsicInst>(CI); if (!II) return false;
switch (II->getIntrinsicID()) { case Intrinsic::memcpy: case Intrinsic::memmove: case Intrinsic::memset: case Intrinsic::objectsize: case Intrinsic::invariant_group_barrier: case Intrinsic::invariant_start: case Intrinsic::invariant_end: return true; default: case Intrinsic::lifetime_start: // zawawa case Intrinsic::lifetime_end: // zawawa return false; } }
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Gateless Gate Sharp, an open-source ETH/XMR miner: http://bit.ly/2rJ2x4VBTC: 1BHwDWVerUTiKxhHPf2ubqKKiBMiKQGomZ
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zawawa (OP)
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February 21, 2017, 09:56:52 PM |
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case Intrinsic::invariant_start: case Intrinsic::invariant_end: case Intrinsic::invariant_group_barrier: Intr->eraseFromParent(); // FIXME: I think the invariant marker should still theoretically apply, // but the intrinsics need to be changed to accept pointers with any // address space. continue; ...I have a bad feeling now. Why is this code so incomplete?
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Gateless Gate Sharp, an open-source ETH/XMR miner: http://bit.ly/2rJ2x4VBTC: 1BHwDWVerUTiKxhHPf2ubqKKiBMiKQGomZ
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zawawa (OP)
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February 21, 2017, 10:07:44 PM |
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God grief, they are not checking GCN address spaces at all! This is unreal... bool llvm::isAllocaPromotable(const AllocaInst *AI) { // FIXME: If the memory unit is of pointer or integer type, we can permit // assignments to subsections of the memory unit. unsigned AS = AI->getType()->getAddressSpace();
// Only allow direct and non-volatile loads and stores... for (const User *U : AI->users()) { if (const LoadInst *LI = dyn_cast<LoadInst>(U)) { // Note that atomic loads can be transformed; atomic semantics do // not have any meaning for a local alloca. if (LI->isVolatile()) return false; } else if (const StoreInst *SI = dyn_cast<StoreInst>(U)) { if (SI->getOperand(0) == AI) return false; // Don't allow a store OF the AI, only INTO the AI. // Note that atomic stores can be transformed; atomic semantics do // not have any meaning for a local alloca. if (SI->isVolatile()) return false; } else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(U)) { if (II->getIntrinsicID() != Intrinsic::lifetime_start && II->getIntrinsicID() != Intrinsic::lifetime_end) return false; } else if (const BitCastInst *BCI = dyn_cast<BitCastInst>(U)) { if (BCI->getType() != Type::getInt8PtrTy(U->getContext(), AS)) return false; if (!onlyUsedByLifetimeMarkers(BCI)) return false; } else if (const GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(U)) { if (GEPI->getType() != Type::getInt8PtrTy(U->getContext(), AS)) return false; if (!GEPI->hasAllZeroIndices()) return false; if (!onlyUsedByLifetimeMarkers(GEPI)) return false; } else { return false; } }
return true; }
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Gateless Gate Sharp, an open-source ETH/XMR miner: http://bit.ly/2rJ2x4VBTC: 1BHwDWVerUTiKxhHPf2ubqKKiBMiKQGomZ
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chrysophylax
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February 21, 2017, 10:28:47 PM |
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God grief, they are not checking GCN address spaces at all! This is unreal... bool llvm::isAllocaPromotable(const AllocaInst *AI) { // FIXME: If the memory unit is of pointer or integer type, we can permit // assignments to subsections of the memory unit. unsigned AS = AI->getType()->getAddressSpace();
// Only allow direct and non-volatile loads and stores... for (const User *U : AI->users()) { if (const LoadInst *LI = dyn_cast<LoadInst>(U)) { // Note that atomic loads can be transformed; atomic semantics do // not have any meaning for a local alloca. if (LI->isVolatile()) return false; } else if (const StoreInst *SI = dyn_cast<StoreInst>(U)) { if (SI->getOperand(0) == AI) return false; // Don't allow a store OF the AI, only INTO the AI. // Note that atomic stores can be transformed; atomic semantics do // not have any meaning for a local alloca. if (SI->isVolatile()) return false; } else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(U)) { if (II->getIntrinsicID() != Intrinsic::lifetime_start && II->getIntrinsicID() != Intrinsic::lifetime_end) return false; } else if (const BitCastInst *BCI = dyn_cast<BitCastInst>(U)) { if (BCI->getType() != Type::getInt8PtrTy(U->getContext(), AS)) return false; if (!onlyUsedByLifetimeMarkers(BCI)) return false; } else if (const GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(U)) { if (GEPI->getType() != Type::getInt8PtrTy(U->getContext(), AS)) return false; if (!GEPI->hasAllZeroIndices()) return false; if (!onlyUsedByLifetimeMarkers(GEPI)) return false; } else { return false; } }
return true; } hehehe ... now this is the sign of a good coder ... ... #crysx
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nerdralph
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February 21, 2017, 11:14:49 PM |
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God grief, they are not checking GCN address spaces at all! This is unreal... bool llvm::isAllocaPromotable(const AllocaInst *AI) { // FIXME: If the memory unit is of pointer or integer type, we can permit // assignments to subsections of the memory unit. unsigned AS = AI->getType()->getAddressSpace();
// Only allow direct and non-volatile loads and stores... for (const User *U : AI->users()) { if (const LoadInst *LI = dyn_cast<LoadInst>(U)) { // Note that atomic loads can be transformed; atomic semantics do // not have any meaning for a local alloca. if (LI->isVolatile()) return false; } else if (const StoreInst *SI = dyn_cast<StoreInst>(U)) { if (SI->getOperand(0) == AI) return false; // Don't allow a store OF the AI, only INTO the AI. // Note that atomic stores can be transformed; atomic semantics do // not have any meaning for a local alloca. if (SI->isVolatile()) return false; } else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(U)) { if (II->getIntrinsicID() != Intrinsic::lifetime_start && II->getIntrinsicID() != Intrinsic::lifetime_end) return false; } else if (const BitCastInst *BCI = dyn_cast<BitCastInst>(U)) { if (BCI->getType() != Type::getInt8PtrTy(U->getContext(), AS)) return false; if (!onlyUsedByLifetimeMarkers(BCI)) return false; } else if (const GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(U)) { if (GEPI->getType() != Type::getInt8PtrTy(U->getContext(), AS)) return false; if (!GEPI->hasAllZeroIndices()) return false; if (!onlyUsedByLifetimeMarkers(GEPI)) return false; } else { return false; } }
return true; } Well, the memory addressing is strange, at least for someone used to C/C++ and assembler. I wish all GCN devices supported flat addressing, but alas we still have to deal with the memory buffer structures.
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zawawa (OP)
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February 22, 2017, 03:41:45 AM |
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There seems to be a problem with LLVM's loop optimizations, so I am disabling them in PassBuilder.cpp. LLVM may be buggy, but it is fun to play with!
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Gateless Gate Sharp, an open-source ETH/XMR miner: http://bit.ly/2rJ2x4VBTC: 1BHwDWVerUTiKxhHPf2ubqKKiBMiKQGomZ
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zawawa (OP)
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February 22, 2017, 04:08:53 AM |
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The second to last Equihash kernel is almost working with occasional invalid solutions. Pretty close!
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Gateless Gate Sharp, an open-source ETH/XMR miner: http://bit.ly/2rJ2x4VBTC: 1BHwDWVerUTiKxhHPf2ubqKKiBMiKQGomZ
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zawawa (OP)
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February 22, 2017, 08:26:12 AM |
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I am almost done. 11 out of 12 Equihash kernels work flawlessly. GCN support of LLVM is incredibly buggy, but I can at least fix them now!
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Gateless Gate Sharp, an open-source ETH/XMR miner: http://bit.ly/2rJ2x4VBTC: 1BHwDWVerUTiKxhHPf2ubqKKiBMiKQGomZ
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m1n1ngP4d4w4n
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February 22, 2017, 10:23:07 AM |
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Hello, I try use for mine ETH. Several pool show very low shares and hashrate, but Gateless Gate show normal rates, why? please check it. For example: nanopool - 20MH / 8 shares, but miner - 77MH / 40 shares, You need to let it run for a longer time to get a true average number on pools. (6-12h at least)
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ColMachoman
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February 22, 2017, 10:27:31 AM |
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You need to let it run for a longer time to get a true average number on pools. (6-12h at least) ok, thank you, I will try..
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ColMachoman
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February 22, 2017, 03:21:16 PM |
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You need to let it run for a longer time to get a true average number on pools. (6-12h at least) ok, thank you, I will try.. I waited about 6h, but same result for 2x rx480 8g + 1x rx470 8g: gatelessgate 0.1.3-pre1 - Started: [2017-02-22 04:20:59] - [0 days 05:56:53] -------------------------------------------------------------------------------- (5s):81.03M (avg):77.58Mh/s | A:371000000000 R:0 HW:145 WU:18.912/m ST: 2 SS: 0 NB: 1510 LW: 39099 GF: 1 RF: 0 Connected to eth-eu1.nanopool.org (stratum) diff 5G as user 0x5... Block: 3fe832b0... Diff:0 Started: [10:17:33] Best share: 791G -------------------------------------------------------------------------------- [P]ool management [G]PU management Settings [D]isplay options [Q]uit GPU 0: | 26.93M/27.02Mh/s | R: 0.0% HW:44 WU:6.465/m xI:4620 GPU 1: | 23.39M/23.38Mh/s | R: 0.0% HW:47 WU:5.815/m xI:4620 GPU 2: | 27.23M/27.19Mh/s | R: 0.0% HW:54 WU:6.633/m xI:4620 but info from pool: Current Calculated Hashrate 17.0 Mh/s Average Hashrate for last 6 hours 16.5 Mh/s Last Reported Hashrate 0.0 Mh/s Shares Date Amount Current hour 3 Feb 22nd 09:59:59 (12 minutes ago) 12 Feb 22nd 08:59:59 (an hour ago) 10 Feb 22nd 07:59:59 (2 hours ago) 15 Feb 22nd 06:59:59 (3 hours ago) 10 Feb 22nd 05:59:59 (4 hours ago) 12 Feb 22nd 04:59:59 (5 hours ago) 8 and from another pool too. Have any idea?
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m1n1ngP4d4w4n
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February 22, 2017, 03:37:05 PM |
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Nope no ideas then, you don't see alot of rejects ?
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ColMachoman
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February 22, 2017, 03:43:36 PM |
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Nope no ideas then, you don't see alot of rejects ?
Yes, rejects for ETH I do not have anywhere. Does anyone use Gatelessgate for mining ETH?
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cryptominer420
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February 22, 2017, 03:46:39 PM |
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I use gateless for ZEC and Pasc only as there are a ton of eth and XMR miners.
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╖╖ ╓╖╖ ╖╖╖ ,╖╖─ ║▒▒ ╢▒╜,@╢▒▒▒║ ╓╣╢╝║║*║▒╢ ╢▒╣ ]▒▒,╢▒╢`]▒▒░╢▒▒╖ ╢▒ ╥╢▒▒▒╢ @║╝╢▒╜ ▒▒Ñ╝╝╢▒▒]▒▒` ]▒▒`╙╢╢║║╖┌▒▒╣▒╢▒▒ ╢▒╝▒▒▒ ╢▒╜║▒╢▒▒╢▒░║▒╜ ╥╥─╙╢╢╢║N ║▒╢ ▒▒╜ ║▒▒╢▒▒╣╓╢@@╢╢╜║▒║ ╢▒╜ ║▒▒ ╙▒▒,║▒▒░▒╣ ║▒▒║ ╢▒▒╢▒▒▒»@╢@@╢╜
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ColMachoman
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February 22, 2017, 03:57:46 PM |
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I use gateless for ZEC and Pasc only as there are a ton of eth and XMR miners.
I try gateless for ZEC, work normal, little low hash then Claymore. But I very wont use gateless for ETH now.
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cryptominer420
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February 22, 2017, 04:02:00 PM |
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Yea, from my testing Gateless gets very close to claymore when you compare poolside.
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╖╖ ╓╖╖ ╖╖╖ ,╖╖─ ║▒▒ ╢▒╜,@╢▒▒▒║ ╓╣╢╝║║*║▒╢ ╢▒╣ ]▒▒,╢▒╢`]▒▒░╢▒▒╖ ╢▒ ╥╢▒▒▒╢ @║╝╢▒╜ ▒▒Ñ╝╝╢▒▒]▒▒` ]▒▒`╙╢╢║║╖┌▒▒╣▒╢▒▒ ╢▒╝▒▒▒ ╢▒╜║▒╢▒▒╢▒░║▒╜ ╥╥─╙╢╢╢║N ║▒╢ ▒▒╜ ║▒▒╢▒▒╣╓╢@@╢╢╜║▒║ ╢▒╜ ║▒▒ ╙▒▒,║▒▒░▒╣ ║▒▒║ ╢▒▒╢▒▒▒»@╢@@╢╜
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twan69666
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February 22, 2017, 04:54:02 PM |
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I use gateless for ZEC and Pasc only as there are a ton of eth and XMR miners.
I try gateless for ZEC, work normal, little low hash then Claymore. But I very wont use gateless for ETH now. FYI - I had the same problems with ETH. Lots of hardware errors regardless of what clock speed my gpu was at. I just chalked it up to ETH not being ready for this yet. Both XMR and ZEC work great though
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jstefanop
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February 22, 2017, 06:04:57 PM |
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I am almost done. 11 out of 12 Equihash kernels work flawlessly. GCN support of LLVM is incredibly buggy, but I can at least fix them now!
Are you seeing any speeds ups from using LLVM vs stock compiler?
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AARosie
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February 22, 2017, 07:01:03 PM |
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What kind of speeds does GG give for XMR with RX 470/480?
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