@kramble I'm thinking of running my FPGAs without fan. I have a big heatsink on them, at which frequency would the theoretical heat be ok for long duration hashing without damaging the Spartan-6 chips?
At 172MHz they don't seem to produce that much heat...
I'm not a professional electronic engineer, so this is just amateur advice. Provided the heatsink is properly installed (good thermal paste and firm mechanical contact with the FPGA package), then as long as it's not too hot to touch (around 60C) you will be fine.
The professionals would use the following information to size the heatsink correctly:
The FPGA manufacturers specify a maximum operating junction temperature of 85C for commercial parts (see table 2
here), with an absolute maximum of 125C. You need to allow for the thermal resistance of the packaging
here, where the important value is ΘJC (junction to case thermal resistance) at 3.7C/W for the FGG484 package and 2.2C/W for the CSG484 used in the ztex, then add the thermal resistance for the heatsink thermal paste, and the heatsink itself. This is all then multiplied by the expected power dissipation to give the temperature rise over ambient (ie the max operating temperature given in the consumer handbook for the product). Then they juggle the choice of cooling solution (heatsink+fan) so that the junction temperature stays below 85C.
The power dissipation depends on the clock frequency, and also (to some extent) the characteristics of the individual chips as manufactured, so estimating the power dissipation during the design phase is an important task (and well beyond my expertise).
Anyway, you can see why I'm not going to be able give an absolute figure, hence my "suck it and see" response above. In practice I'd just ramp the clock up until it starts giving hardware errors, then back off a bit. Then monitor the heatsink temperature to check it's not getting too hot over a period of time (the finger-test is a reasonable approximation). Be prepared to re-evaluate if the operating conditions change (eg from winter to summer).
The ztex are a bit awkward to judge the best clock speed as they seem to give hardware errors even during normal operation (probably a bug in the communication protocol, either in the driver or the FPGA code). The max clock will vary between individual devices, so the cgminer clock parameters allow each to be set individually. You should expect to achieve around 200MHz for the -3 speed grade devices (a little less for the cheaper clones using -2 speed grade). I run my lancelot at 195MHz and I was getting 220MHz for one of the devices on BlueDragon's CM1.
Also you may find you can achieve a faster clock speed if you run the device cooler (silicon generally gives better performance at lower temperatures), so its up to you to decide the acceptable trade-off between perhaps a lower clock speed with no fan cooling, and a higher clock speed with a fan (and its associated noise).
PS I did find that both the ztex 1.15y and CM1 boards I had on loan from BlueDragon
did overheat if I forgot to turn the fan on (sorry Blue, no damage done though). I only noticed when the boards stated to smell hot! (I was using a separate FAN PSU initially, all a bit Heat Robinson/Rube Goldberg as Blue didn't include the fans to save on postage costs).
