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Author Topic: ZTEX USB-FPGA Modules 1.15x and 1.15y: 215 and 860 MH/s FPGA Boards  (Read 182330 times)
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March 10, 2012, 01:40:31 PM
 #361

Dr Z. what will be your answer to this ? https://bitcointalk.org/index.php?topic=49971.0 Any plans on a 3 ring design ?

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March 10, 2012, 03:39:11 PM
 #362

I got rid of the high speed config issue since i moved my vm to parallels Smiley

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March 10, 2012, 07:12:32 PM
 #363

HDD mounting plates ? Nice idea Smiley

Indeed! Very elegant idea. I'd like to try it with Icarus boards.

Anyone know where he possibly bought this hdd enclosure? I've been hunting on newegg but can't seem to find something similar. I'm guessing that it was taken from a case though.

Edit: Hmm, I found something similar : http://www.newegg.ca/Product/Product.aspx?Item=N82E16816111045

I still think the one in the picture looks bigger though, but I could be wrong.

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March 10, 2012, 08:25:17 PM
 #364

HDD mounting plates ? Nice idea Smiley

Indeed! Very elegant idea. I'd like to try it with Icarus boards.

Anyone know where he possibly bought this hdd enclosure? I've been hunting on newegg but can't seem to find something similar. I'm guessing that it was taken from a case though.

Edit: Hmm, I found something similar : http://www.newegg.ca/Product/Product.aspx?Item=N82E16816111045

I still think the one in the picture looks bigger though, but I could be wrong.

Thanks. The rack is by "sans digital". It's two of them stacked.
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March 10, 2012, 08:41:04 PM
 #365

Dr Z. what will be your answer to this ? https://bitcointalk.org/index.php?topic=49971.0 Any plans on a 3 ring design ?
Hm, can somebody explain how this works like I'm 5 years old? Smiley

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March 10, 2012, 08:44:10 PM
 #366

Dr Z. what will be your answer to this ? https://bitcointalk.org/index.php?topic=49971.0 Any plans on a 3 ring design ?
Hm, can somebody explain how this works like I'm 5 years old? Smiley

This is kind of a hand written, well optimized firmware for the FPGA, in contrast to the automatically synthesized one that the FPGA boards are currently using. If he continues optimizing it and makes it publicly available, I'd estimate that it will end up in the 300-400MH/s range.

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March 11, 2012, 01:21:20 AM
 #367

HDD mounting plates ? Nice idea Smiley

Indeed! Very elegant idea. I'd like to try it with Icarus boards.

Anyone know where he possibly bought this hdd enclosure? I've been hunting on newegg but can't seem to find something similar. I'm guessing that it was taken from a case though.

Edit: Hmm, I found something similar : http://www.newegg.ca/Product/Product.aspx?Item=N82E16816111045

I still think the one in the picture looks bigger though, but I could be wrong.

Thanks. The rack is by "sans digital". It's two of them stacked.

Cool. Thanks for confirming that. Time to hit up newegg Cheesy

The only thing is that I'm not sure if the icarus boards would work with hd trays ad they aren't following the 3.5" format. X6500 and ztex board would work though.


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March 11, 2012, 08:54:27 AM
 #368

is it feasible a ztex dual or quad  board to adjust prices?   Maybe I'm wrong but it seems to me a way to save in pcb costs  (and space)

i guess it will be over 800-900€ 150x4€(fpga) + ~200-300€ (pcb) for a 800-900 mhash/s    it will be a nice 1€ per Mhash/s

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March 11, 2012, 10:14:22 AM
 #369

is it feasible a ztex dual or quad  board to adjust prices?   Maybe I'm wrong but it seems to me a way to save in pcb costs  (and space)

i guess it will be over 800-900€ 150x4€(fpga) + ~200-300€ (pcb) for a 800-900 mhash/s    it will be a nice 1€ per Mhash/s


The PCB isn't all that expensive, but there's also things like power regulation on it.
To name dollar prices: The FPGAs cost $160 each, and there don't seem to be bulk discounts as long as you buy less than 1000 of them at once.
So judging from the bulk discounts, the rest of the board, including assembly can't cost more than $50, otherwise he would be selling them at a loss.
This means that there he has at least $165 profit margin per board (for small amounts), more than those FPGAs cost!

Placing more FPGAs on a board doesn't neccessarily make things better because it also increases the risk of board failure.

If you want a cheaper solution, go different board or order real bulk amounts Smiley

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March 11, 2012, 10:44:07 AM
 #370

is it feasible a ztex dual or quad  board to adjust prices?   Maybe I'm wrong but it seems to me a way to save in pcb costs  (and space)

i guess it will be over 800-900€ 150x4€(fpga) + ~200-300€ (pcb) for a 800-900 mhash/s    it will be a nice 1€ per Mhash/s


The PCB isn't all that expensive, but there's also things like power regulation on it.
To name dollar prices: The FPGAs cost $160 each, and there don't seem to be bulk discounts as long as you buy less than 1000 of them at once.
So judging from the bulk discounts, the rest of the board, including assembly can't cost more than $50, otherwise he would be selling them at a loss.
This means that there he has at least $165 profit margin per board (for small amounts), more than those FPGAs cost!

Placing more FPGAs on a board doesn't neccessarily make things better because it also increases the risk of board failure.

If you want a cheaper solution, go different board or order real bulk amounts Smiley

i thought about 10+ but  i thought it will be more easy to manage with  less pcbs, sharing power and usb cables.

if you go to 50+ prices becomes 1€ /mhash/s  this its ok to me but 50 pcbs will become a little messy. i like this but i would like he made  4 or 2 pfga pcbs for similar price.  
 

REgards

PS: i'm From EU so i'd rather buy this over x6500 and others.

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March 12, 2012, 11:01:47 AM
 #371

This is kind of a hand written, well optimized firmware for the FPGA, in contrast to the automatically synthesized one that the FPGA boards are currently using. If he continues optimizing it and makes it publicly available, I'd estimate that it will end up in the 300-400MH/s range.

Three single single hash, two stage per sha256 round pipelines does not fit on a LX150. This simply requires more resources than available on the chip.

One stage per sha256 round pipelines as used by eldentyrell are about 30% to 40% slower.


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March 12, 2012, 11:11:49 AM
 #372

This is kind of a hand written, well optimized firmware for the FPGA, in contrast to the automatically synthesized one that the FPGA boards are currently using. If he continues optimizing it and makes it publicly available, I'd estimate that it will end up in the 300-400MH/s range.

Three single single hash, two stage per sha256 round pipelines does not fit on a LX150. This simply requires more resources than available on the chip.

One stage per sha256 round pipelines as used by eldentyrell are about 30% to 40% slower.

...which I hope will change soon Smiley

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March 12, 2012, 12:29:47 PM
 #373

Three single single hash, two stage per sha256 round pipelines does not fit on a LX150. This simply requires more resources than available on the chip.

One stage per sha256 round pipelines as used by eldentyrell are about 30% to 40% slower.

...which I hope will change soon Smiley

It's not a matter of hope. Longer pipelines have less levels of logic and are therefore faster.

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March 12, 2012, 01:41:32 PM
 #374

ztex have you looked at Artix-7.  What do you think is possible with 350K LUTs?  I know without access to the actual chip it is hard to say but looking at the specs & whitepapers does anything stand out?
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March 12, 2012, 01:43:44 PM
 #375

Placing more FPGAs on a board doesn't neccessarily make things better because it also increases the risk of board failure.

Which is why a daughter card like board would make sense for 4+ FPGA right?

Put all the DC to DC switching, power routing, fan headers, host communications (USB microcontroller) on a backplane and make the FPGA board very simple.  Essentially the FPGA, some caps, and an edge connector.
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March 12, 2012, 03:40:44 PM
 #376

Three single single hash, two stage per sha256 round pipelines does not fit on a LX150. This simply requires more resources than available on the chip.

One stage per sha256 round pipelines as used by eldentyrell are about 30% to 40% slower.

...which I hope will change soon Smiley

It's not a matter of hope. Longer pipelines have less levels of logic and are therefore faster.

From what I can tell, the Xilinx tools usually screw up spartan6 routing rather badly. It might well be possible that a hand optimized design can reach the 200MHz area, or even more, even with just one pipeline stage per SHA256 round. I'm also not sure if it even has only a single pipeline stage per round, or if he managed to cram two in there. (LUTs as shift registers should provide sufficient space)

And a this design uses space and routing resources much more efficiently than anything not hand-placed. So even if he "only" reaches the same clock as the current designs, he'll fit a whole additional hashing core in there, so speed would be 50% higher.

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March 12, 2012, 05:11:50 PM
 #377

Placing more FPGAs on a board doesn't neccessarily make things better because it also increases the risk of board failure.

Which is why a daughter card like board would make sense for 4+ FPGA right?

Put all the DC to DC switching, power routing, fan headers, host communications (USB microcontroller) on a backplane and make the FPGA board very simple.  Essentially the FPGA, some caps, and an edge connector.
This will require more expensive high-current connectors for daughter cards, but may be a good idea sometimes.

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March 12, 2012, 05:14:58 PM
 #378

Placing more FPGAs on a board doesn't neccessarily make things better because it also increases the risk of board failure.

Which is why a daughter card like board would make sense for 4+ FPGA right?

Put all the DC to DC switching, power routing, fan headers, host communications (USB microcontroller) on a backplane and make the FPGA board very simple.  Essentially the FPGA, some caps, and an edge connector.
This will require more expensive high-current connectors for daughter cards, but may be a good idea sometimes.

I don't think the connectors would need to be that expensive.  We are only taking <8A per card.
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March 12, 2012, 11:05:36 PM
 #379

Just an update:  Got another batch of boards from ztex.  It has been running smoothly and it seems like the February batch is hashing really well like ztex posted.  The average across the boards is around 213Mhz; 2 running at 224, 4 at 220, 12 at 216.  Nice work! 

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2012-03-13T15:51:42: bus-0-1: ztex_ufm1_15d3-2012-L2-B1: f=216.00MHz,  errorRate=0.39%,  maxErrorRate=1.32%,  hashRate=215.2MH/s,  submitted 13 new nonces,  luckFactor=1.00
2012-03-13T15:51:42: bus-0-2: ztex_ufm1_15d3-2012-L2-A0: f=216.00MHz,  errorRate=0.11%,  maxErrorRate=0.99%,  hashRate=215.8MH/s,  submitted 17 new nonces,  luckFactor=1.01
2012-03-13T15:51:42: bus-0-2: ztex_ufm1_15d3-2012-L2-A1: f=212.00MHz,  errorRate=0.00%,  maxErrorRate=0.47%,  hashRate=212.0MH/s,  submitted 17 new nonces,  luckFactor=1.00
2012-03-13T15:51:42: bus-0-2: ztex_ufm1_15d3-2012-L2-A2: f=216.00MHz,  errorRate=0.32%,  maxErrorRate=1.16%,  hashRate=215.3MH/s,  submitted 15 new nonces,  luckFactor=1.01
2012-03-13T15:51:42: bus-0-2: ztex_ufm1_15d3-2012-L2-A3: f=220.00MHz,  errorRate=0.01%,  maxErrorRate=0.89%,  hashRate=220.0MH/s,  submitted 17 new nonces,  luckFactor=1.00
2012-03-13T15:51:42: bus-0-2: ztex_ufm1_15d3-2012-L2-A8: f=216.00MHz,  errorRate=0.00%,  maxErrorRate=0.65%,  hashRate=216.0MH/s,  submitted 9 new nonces,  luckFactor=1.00
2012-03-13T15:51:42: bus-0-2: ztex_ufm1_15d3-2012-L2-A9: f=224.00MHz,  errorRate=0.00%,  maxErrorRate=0.64%,  hashRate=224.0MH/s,  submitted 9 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-2: ztex_ufm1_15d3-2012-L2-B0: f=208.00MHz,  errorRate=0.00%,  maxErrorRate=0.25%,  hashRate=208.0MH/s,  submitted 15 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-2: ztex_ufm1_15d3-2012-L2-B2: f=212.00MHz,  errorRate=0.01%,  maxErrorRate=0.89%,  hashRate=212.0MH/s,  submitted 14 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-2: ztex_ufm1_15d3-2012-L2-B3: f=212.00MHz,  errorRate=0.11%,  maxErrorRate=1.48%,  hashRate=211.8MH/s,  submitted 15 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-2: ztex_ufm1_15d3-2012-L2-B4: f=212.00MHz,  errorRate=0.39%,  maxErrorRate=1.32%,  hashRate=211.2MH/s,  submitted 18 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-A4: f=220.00MHz,  errorRate=0.05%,  maxErrorRate=0.65%,  hashRate=219.9MH/s,  submitted 14 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-A5: f=216.00MHz,  errorRate=0.08%,  maxErrorRate=0.89%,  hashRate=215.8MH/s,  submitted 18 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-A6: f=212.00MHz,  errorRate=0.00%,  maxErrorRate=0.50%,  hashRate=212.0MH/s,  submitted 15 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-A7: f=220.00MHz,  errorRate=0.14%,  maxErrorRate=1.23%,  hashRate=219.7MH/s,  submitted 17 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-B5: f=208.00MHz,  errorRate=0.48%,  maxErrorRate=1.83%,  hashRate=207.0MH/s,  submitted 9 new nonces,  luckFactor=0.99
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-B6: f=216.00MHz,  errorRate=0.01%,  maxErrorRate=1.17%,  hashRate=216.0MH/s,  submitted 10 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-B7: f=212.00MHz,  errorRate=0.00%,  maxErrorRate=0.74%,  hashRate=212.0MH/s,  submitted 15 new nonces,  luckFactor=1.02
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-B8: f=216.00MHz,  errorRate=0.00%,  maxErrorRate=0.62%,  hashRate=216.0MH/s,  submitted 9 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-B9: f=208.00MHz,  errorRate=0.00%,  maxErrorRate=0.31%,  hashRate=208.0MH/s,  submitted 13 new nonces,  luckFactor=1.02
2012-03-13T15:51:43: bus-0-3: ztex_ufm1_15d3-2012-L2-C0: f=212.00MHz,  errorRate=0.18%,  maxErrorRate=1.18%,  hashRate=211.6MH/s,  submitted 12 new nonces,  luckFactor=1.03
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-C1: f=212.00MHz,  errorRate=0.03%,  maxErrorRate=0.77%,  hashRate=211.9MH/s,  submitted 14 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-C2: f=208.00MHz,  errorRate=0.12%,  maxErrorRate=1.13%,  hashRate=207.7MH/s,  submitted 15 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-C3: f=212.00MHz,  errorRate=0.32%,  maxErrorRate=2.16%,  hashRate=211.3MH/s,  submitted 20 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-C4: f=216.00MHz,  errorRate=0.04%,  maxErrorRate=1.18%,  hashRate=215.9MH/s,  submitted 12 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-C5: f=212.00MHz,  errorRate=0.02%,  maxErrorRate=0.67%,  hashRate=212.0MH/s,  submitted 24 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-D0: f=216.00MHz,  errorRate=0.00%,  maxErrorRate=0.61%,  hashRate=216.0MH/s,  submitted 18 new nonces,  luckFactor=1.02
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-D1: f=216.00MHz,  errorRate=0.30%,  maxErrorRate=1.99%,  hashRate=215.4MH/s,  submitted 9 new nonces,  luckFactor=0.99
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-D2: f=204.00MHz,  errorRate=0.55%,  maxErrorRate=1.79%,  hashRate=202.9MH/s,  submitted 13 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-D3: f=212.00MHz,  errorRate=0.00%,  maxErrorRate=1.00%,  hashRate=212.0MH/s,  submitted 13 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-4: ztex_ufm1_15d3-2012-L2-D4: f=208.00MHz,  errorRate=0.00%,  maxErrorRate=0.43%,  hashRate=208.0MH/s,  submitted 17 new nonces,  luckFactor=0.99
2012-03-13T15:51:43: bus-0-5: ztex_ufm1_15d3-2012-L2-C6: f=212.00MHz,  errorRate=0.49%,  maxErrorRate=1.60%,  hashRate=211.0MH/s,  submitted 12 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-5: ztex_ufm1_15d3-2012-L2-C7: f=204.00MHz,  errorRate=0.01%,  maxErrorRate=0.86%,  hashRate=204.0MH/s,  submitted 12 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-5: ztex_ufm1_15d3-2012-L2-C8: f=204.00MHz,  errorRate=0.44%,  maxErrorRate=1.04%,  hashRate=203.1MH/s,  submitted 16 new nonces,  luckFactor=1.03
2012-03-13T15:51:43: bus-0-5: ztex_ufm1_15d3-2012-L2-C9: f=212.00MHz,  errorRate=0.40%,  maxErrorRate=1.41%,  hashRate=211.2MH/s,  submitted 17 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-5: ztex_ufm1_15d3-2012-L2-D5: f=216.00MHz,  errorRate=0.50%,  maxErrorRate=1.10%,  hashRate=214.9MH/s,  submitted 15 new nonces,  luckFactor=1.00
2012-03-13T15:51:43: bus-0-5: ztex_ufm1_15d3-2012-L2-D6: f=220.00MHz,  errorRate=0.27%,  maxErrorRate=0.81%,  hashRate=219.4MH/s,  submitted 11 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-5: ztex_ufm1_15d3-2012-L2-D7: f=216.00MHz,  errorRate=0.00%,  maxErrorRate=0.71%,  hashRate=216.0MH/s,  submitted 17 new nonces,  luckFactor=0.99
2012-03-13T15:51:43: bus-0-5: ztex_ufm1_15d3-2012-L2-D8: f=208.00MHz,  errorRate=0.50%,  maxErrorRate=1.89%,  hashRate=207.0MH/s,  submitted 18 new nonces,  luckFactor=1.01
2012-03-13T15:51:43: bus-0-5: ztex_ufm1_15d3-2012-L2-D9: f=224.00MHz,  errorRate=0.42%,  maxErrorRate=1.66%,  hashRate=223.1MH/s,  submitted 15 new nonces,  luckFactor=1.00
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March 13, 2012, 05:27:04 AM
 #380

Just an update:  Got another batch of boards from ztex.  It has been running smoothly and it seems like the February batch is hashing really well like ztex posted.  The average across the boards is around 213Mhz; 2 running at 224, 4 at 220, 12 at 216.  Nice work! 

That's good to hear. May I ask how many you have at this moment? One computer only? What do you think about the heat? I am very interested to hear your feedback.
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