X6500 Custom FPGA Miner

[sirky]

243.94 MH/s | 0: 9305/772/0 7.7% | 1: 9282/836/0 8.3% | 4d2h45m

before the LP support i had around 10% stale, now i hab 8%, also V0.11 is stable for me

Okay, I was getting like 10 even after LP at ABCPool, and I am getting like 6% at BTCGuild now.

[1714178202]

1714178202

[1714178202]

1714178202

[fizzisist]

I tested the software against ABCPool and it appears that it's replying with no data to most of the long-poll requests. I have no idea why that is. Does anyone happen to know if ABCPool does something quirky there? I'll do some more debugging...

Thanks for reporting the stales you guys have seen. I'm really not sure why they're so high. Definitely need to do some more work here. For what it's worth, Eligius usually reports between 4 and 6 % rejects, and a number of those are supposedly duplicates, so I'm not exactly sure what that means or how that could be happening.

In other news, we're testing out new firmware! fpgaminer was able to incorporate some of ztex's open source HDL and it's now running at 175 MHz (350 MH/s for the X6500). We need to do a little more testing and update the copyright notices and we'll release it to all of you. Sorry to make you wait!

[sadpandatech]

I tested the software against ABCPool and it appears that it's replying with no data to most of the long-poll requests. I have no idea why that is. Does anyone happen to know if ABCPool does something quirky there? I'll do some more debugging...

Thanks for reporting the stales you guys have seen. I'm really not sure why they're so high. Definitely need to do some more work here. For what it's worth, Eligius usually reports between 4 and 6 % rejects, and a number of those are supposedly duplicates, so I'm not exactly sure what that means or how that could be happening.

In other news, we're testing out new firmware! fpgaminer was able to incorporate some of ztex's open source HDL and it's now running at 175 MHz (350 MH/s for the X6500). We need to do a little more testing and update the copyright notices and we'll release it to all of you. Sorry to make you wait!

350MH?  pretty nifty.

[thirdlight]

Looking forward to the new firmware. 

Also, your continued support of the previous board (X5000 - only very few boards made) should give any potential customers confidence.

[O_Shovah]

Hello,
to add some math to this disscussion i would like to advertise my new

"Bitcoin mine or invest spreadsheet & mining rig comparison spreadsheet"
https://bitcointalk.org/index.php?topic=56475.new#new

Please use it to find your very own answer about how your minig rig will perform.

I hope it is helpfull to you all 

[freshzive]

My X6500 is out for delivery today! Yay! Testing tonight.

[tgmarks]

175 mh/s sounds awesome!!! can't wait.

[jago25_98]

My head's spinning and it's late.

All I'll say instead is that I'd love to see a profitability analysis on this assuming no electricity is being paid for, and then the same thing with electric at a USA rate with a laptop or netbook.

[RandyFolds]

My head's spinning and it's late.

All I'll say instead is that I'd love to see a profitability analysis on this assuming no electricity is being paid for, and then the same thing with electric at a USA rate with a laptop or netbook.

google up some bitcoin profitability calculator, holmes.

[freshzive]

On a Mac, anyway to solve this?

MacBook-Pro:x6500-miner nelsoncrs$ python program.py fpgaminer_133mhz.bit
Traceback (most recent call last):
  File "program.py", line 23, in <module>
    from ft232r import FT232R, FT232R_PortList
  File "/Users/nelsoncrs/x6500/x6500-miner/ft232r.py", line 22, in <module>
    import d2xx
  File "/opt/local/Library/Frameworks/Python.framework/Versions/2.6/lib/python2.6/site-packages/d2xx/__init__.py", line 24, in <module>
    from _d2xx import *
ImportError: dlopen(/opt/local/Library/Frameworks/Python.framework/Versions/2.6/lib/python2.6/site-packages/d2xx/_d2xx.so, 2): Library not loaded: /usr/local/lib/libftd2xx.1.0.4.dylib
  Referenced from: /opt/local/Library/Frameworks/Python.framework/Versions/2.6/lib/python2.6/site-packages/d2xx/_d2xx.so
  Reason: image not found

EDIT: And yes, I copied the files as instructed here http://www.ftdichip.com/Drivers/D2XX.htm for the driver...is there some module I need to load somehow?

[tf101]

Id just like to shout a thanks out to Fizzisist for his help over the last few days (some how I managed to blow a cct protection fuse on the molex connector to one of my boards). He has provided all the details needed and troubleshooting for repair, and offered repair free of charge (so great support). Currently mining on slushes pool with the following stats:

279.41 MH/s | 0: 1305/109/1 7.7% | 1: 1284/133/2 9.4% | 12h45m | AH00WOWE

and:

Run Summary:
-------------
Device: 0
Serial: AH00WOVP
JTAG chain: 2
Number of FPGAs: 2
Running time: 15h1m
Getwork interval: 30 secs
Chain 0:
  Accepted: 1440
  Rejected: 112 (7.22%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 114.32 MH/s
  Hashrate w/ rejects: 123.21 MH/s
Chain 1:
  Accepted: 1350
  Rejected: 127 (8.60%)
  Invalid: 16 (1.07%)
  Accepted hashrate: 107.17 MH/s
  Hashrate w/ rejects: 117.26 MH/s
Total hashrate for device: 221.50 MH/s / 240.48 MH/s

Each boards heat sink is at 37 degrees C, rear of board 49 Degrees C (ambient is 30 degrees C), and it is drawing 0.9A at 12v (inc an 80mm fan each).

Currently migrating the boards over to a dedicated mining micro PC (running a VIA 700 chipset and ubuntu), all powered off a ESP113 power supply (a HP 32A rated rack mount supply - details for them and using them for 12v supply can be found at http://www.rcgroups.com/forums/showthread.php?t=358340&highlight=hp+hot+swap+power+supply, the 5v 5A supply is the large middle pin on the bottom side).

There are a few stales in there, but I am looking at moving to a slightly smaller pool that I might have some better luck with... any suggestions? anyone tried bitminter with fpgas?

[Qoheleth]

I'm pleased to report that I've located a second usable power supply in my apartment, and both my boards seem to finally be up and running.

On about half of the long-poll new blocks, I see errors like this:

2012-01-03 19:36:09 | Long-poll: new block 0000094048607f5b
2012-01-03 19:36:09 | (FPGA1) Error getting work! Retrying...

For what it's worth, I'm using eligius - same as the devs.

[freshzive]

After some fiddling, I got it to work on my Macbook. Installed Python 2.7.2 from the website (rather than Macports) and copied D2XX driver to the old version name that PyUSB seems to be looking for  "/usr/local/lib/libftd2xx.1.0.4.dylib".

Now, when I run python program.py fpgaminer_133mhz.bit

I get this:

2012-01-03 20:25:28 | Opening bitstream file: fpgaminer_133mhz.bit
2012-01-03 20:25:28 | Bitstream file opened:
2012-01-03 20:25:28 |  Design Name: fpgaminer_top.ncd;HW_TIMEOUT=FALSE;UserID=0xFFFFFFFF
2012-01-03 20:25:28 |  Part Name: 6slx150fgg484
2012-01-03 20:25:28 |  Date: 2011/11/28
2012-01-03 20:25:28 |  Time: 00:31:46
2012-01-03 20:25:28 |  Bitstream Length: 4220768
2012-01-03 20:25:29 | Device 0 opened (AH00WOVL)
2012-01-03 20:25:29 | Discovering JTAG chain 0 ...


But it just stalls at this point forever....

[tf101]

I had that issue when I was first installing on linux... only way I fixed it was down grading to 2.6.7, when running python specifying the version (python2.6 <command>) and re-building PyUSB component.

[li_gangyi]

I have found that forcing the getwork interval back to 20 secs (it's now default at 30 I believe), decreases my % of stales. Not sure if it applies to everyone, but you might wanna give it try.

[freshzive]

Up and running in Windows 7 easily, not sure why I can't get it to run in OS X Lion. Even after downgrading to 2.6.7 and specifically specifying python2.6 it still stalls.

Looks like I'm getting some rejects/etc on ABCPool.co though:

2012-01-04 10:21:45 | (FPGA1) accepted d4c4a742L
2012-01-04 10:21:51 | (FPGA1) Golden nonce found
2012-01-04 10:21:51 | (FPGA0) Golden nonce found
2012-01-04 10:21:51 | (FPGA1) rejected 40e1373L
2012-01-04 10:21:52 | (FPGA0) rejected 4ca10bfL
2012-01-04 10:22:00 | (FPGA0) Job data loaded
2012-01-04 10:22:00 | (FPGA1) Job data loaded
276.04 MH/s | 0: 9/1/0 10.0% | 1: 12/1/0 7.7% | 6m37s | AH00WOVL

What pool is everyone using?

[fizzisist]

Version 0.2 is out!

The main changes in this are:

• Long-polling
• Progress line during bitstream pre-preprocessing
• And probably most importantly, fixed a bug in formatting data for share submission. Thanks to m0mchil for finding this! In my little bit of testing so far, this has reduced the number of rejects down to maybe 2%. I didn't want to wait to get this out, so please report the reject rates that you find in your own testing.

Download it from Github here.

Thanks again, m0mchil!!

[fizzisist]

After some fiddling, I got it to work on my Macbook. Installed Python 2.7.2 from the website (rather than Macports) and copied D2XX driver to the old version name that PyUSB seems to be looking for  "/usr/local/lib/libftd2xx.1.0.4.dylib".

Now, when I run python program.py fpgaminer_133mhz.bit

I get this:

2012-01-03 20:25:28 | Opening bitstream file: fpgaminer_133mhz.bit
2012-01-03 20:25:28 | Bitstream file opened:
2012-01-03 20:25:28 |  Design Name: fpgaminer_top.ncd;HW_TIMEOUT=FALSE;UserID=0xFFFFFFFF
2012-01-03 20:25:28 |  Part Name: 6slx150fgg484
2012-01-03 20:25:28 |  Date: 2011/11/28
2012-01-03 20:25:28 |  Time: 00:31:46
2012-01-03 20:25:28 |  Bitstream Length: 4220768
2012-01-03 20:25:29 | Device 0 opened (AH00WOVL)
2012-01-03 20:25:29 | Discovering JTAG chain 0 ...


But it just stalls at this point forever....

Another user had this problem on Linux, and it turned out it was because he used the new D2XX drivers that came out on 12/23. I haven't had a chance to hack PyUSB to work with that, so please try it with 1.0.4 (download here). Please let us know if that works for you!

[freshzive]

Windows 7, Version 0.1.1, ABCPool:

Code:

Run Summary:
-------------
Device: 0
Serial: AH00WOVL
JTAG chain: 2
Number of FPGAs: 2
Running time: 34m26s
Getwork interval: 20 secs
Chain 0:
  Accepted: 60
  Rejected: 5 (7.69%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 124.70 MH/s
  Hashrate w/ rejects: 135.09 MH/s
Chain 1:
  Accepted: 66
  Rejected: 2 (2.94%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 137.17 MH/s
  Hashrate w/ rejects: 141.33 MH/s
Total hashrate for device: 261.87 MH/s / 276.42 MH/s

Windows 7, Version 0.2, ABCPool:

Code:

Device: 0
Serial: AH00WOVL
JTAG chain: 2
Number of FPGAs: 2
Running time: 21m27s
Getwork interval: 30 secs
Chain 0:
  Accepted: 39
  Rejected: 0 (0.00%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 130.13 MH/s
  Hashrate w/ rejects: 130.13 MH/s
Chain 1:
  Accepted: 36
  Rejected: 1 (2.70%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 120.12 MH/s
  Hashrate w/ rejects: 123.46 MH/s
Total hashrate for device: 250.26 MH/s / 253.60 MH/s

Reject rate has definitely dropped dramatically with the new version. However, hashrate has actually dropped, I believe due to a a new error that I wasn't seeing before:

Code:

2012-01-04 11:11:49 | Long-poll: ValueError! No JSON object could be decoded

Maybe this has something to do with ABC Pool though? I'll try out a different pool. Also still getting lots of these "Golden nonce found" errors, not sure if they actually matter though?

[spiccioli]

Each boards heat sink is at 37 degrees C, rear of board 49 Degrees C (ambient is 30 degrees C), and it is drawing 0.9A at 12v (inc an 80mm fan each).

tf101,

do you mean 0.9A at 12v per fpga or per board?

I though each board would use nearly 20W at 200MH.

Regards.

spiccioli