X6500 Custom FPGA Miner

[thirdlight]

I'm seeing 310 MH/s and 2.8% rejected, running for > 12 hours, at DoubleC's 4 coin merged pool

[shad]

after getwork 15s (-i 15)
312.49 MH/s | 0: 105/2/0 1.9% | 1: 124/5/0 3.9% | 53m55s

[Cablesaurus]

FPGA card standoff/jackscrew stacking kits are now available. Here's the link: http://cablesaurus.com/index.php?main_page=product_info&cPath=14&products_id=60

[Cablesaurus]

Other accessories:

10-Port powered USB hub: http://cablesaurus.com/index.php?main_page=product_info&cPath=14&products_id=55


8-Slot Molex splitter: http://cablesaurus.com/index.php?main_page=product_info&cPath=14&products_id=51


USB cables: http://cablesaurus.com/index.php?main_page=product_info&cPath=14&products_id=54


24-pin PSU dummy plug: http://cablesaurus.com/index.php?main_page=product_info&cPath=13&products_id=45


20-pin PSU dummy plug: http://cablesaurus.com/index.php?main_page=product_info&cPath=13&products_id=44




AC adapters are coming in soon!

[tgmarks]

after getwork 15s (-i 15)
312.49 MH/s | 0: 105/2/0 1.9% | 1: 124/5/0 3.9% | 53m55s

Thanks, this brought my rejected rate down from 18%the to 1%. Hashrate is about 315.

[allinvain]

Hey fizzisist, any chance of getting the hashrate up to ~400 MH like ngzhang's Icarus board? Technically speaking isn't your board supposed to be 20% faster due to the higher -3 fpga speed grade?

Also a standard heatsink + fan cooling solution (optional during purchase) would be really cool. It doesn't have to be crazy or anything just enough to keep the fpga chips running cool at the highest clock currently available (166 if I'm not mistaken).

[sadpandatech]

Hey fizzisist, any chance of getting the hashrate up to ~400 MH like ngzhang's Icarus board? Technically speaking isn't your board supposed to be 20% faster due to the higher -3 fpga speed grade?

I'd imagine that is where this will eventually be at. Keep in mind 200MH per S6-3 is the max until someone figures out how to squeeze a third ring in there. (someone is getting closer to that as well)

Also a standard heatsink + fan cooling solution (optional during purchase) would be really cool. It doesn't have to be crazy or anything just enough to keep the fpga chips running cool at the highest clock currently available (166 if I'm not mistaken).

I believe this is in the works after some more testing has been done with the new higher speed.

can't wait. =)

[allinvain]

I'd imagine that is where this will eventually be at. Keep in mind 200MH per S6-3 is the max until someone figures out how to squeeze a third ring in there. (someone is getting closer to that as well)

That would be nice. Pretty soon these poor little fpgas will start feeling the heat. Makes me wonder if there is a limit to how far you can drive up the clock. Even 166 is pushing it, no?

Also a standard heatsink + fan cooling solution (optional during purchase) would be really cool. It doesn't have to be crazy or anything just enough to keep the fpga chips running cool at the highest clock currently available (166 if I'm not mistaken).

I believe this is in the works after some more testing has been done with the new higher speed.

can't wait. =)

Same here. I'd also like to see a tri or quad fpga board, and if possible a lower board price, but I know that's difficult given the fact that the Spartan 6's arent' exactly cheap.

[sadpandatech]

I'd imagine that is where this will eventually be at. Keep in mind 200MH per S6-3 is the max until someone figures out how to squeeze a third ring in there. (someone is getting closer to that as well)

That would be nice. Pretty soon these poor little fpgas will start feeling the heat. Makes me wonder if there is a limit to how far you can drive up the clock. Even 166 is pushing it, no?

Nah, 166 is perfectly safe. The Ztex board for example is running at 200MHz.  Just a matter of optimizing the board to help draw heat off the chip and top cooling.

The 3 ring core right now is being designed at 161MHz. But thats (161*3)*.5 = 241.5MHs   It is not a certain thing though and still has a ways to go in dev and testing.

[allinvain]

I'd imagine that is where this will eventually be at. Keep in mind 200MH per S6-3 is the max until someone figures out how to squeeze a third ring in there. (someone is getting closer to that as well)

That would be nice. Pretty soon these poor little fpgas will start feeling the heat. Makes me wonder if there is a limit to how far you can drive up the clock. Even 166 is pushing it, no?

Nah, 166 is perfectly safe. The Ztex board for example is running at 200MHz.  Just a matter of optimizing the board to help draw heat off the chip and top cooling.

The 3 ring core right now is being designed at 161MHz. But thats (161*3)*.5 = 241.5MHs   It is not a certain thing though and still has a ways to go in dev and testing.

Nice - 241 MHs per core would be really sweet. For me at least that means I can replace a 5870 (overclocked modestly to 900 MHz) with one of these boards

[freshzive]

Overnight runs with the 166Mhz bitstream on my 2 FPGAs:

Code:

Device: 1
Serial: AH00WOVL
JTAG chain: 2
Number of FPGAs: 2
Running time: 13h50m
Getwork interval: 15 secs
Chain 0:
  Accepted: 1676
  Rejected: 32 (1.87%)
  Invalid: 1 (0.06%)
  Accepted hashrate: 144.48 MH/s
  Hashrate w/ rejects: 147.24 MH/s
Chain 1:
  Accepted: 1662
  Rejected: 35 (2.06%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 143.27 MH/s
  Hashrate w/ rejects: 146.29 MH/s
Total hashrate for device: 287.75 MH/s / 293.53 MH/s

Code:

Device: 0
Serial: AH00WOWI
JTAG chain: 2
Number of FPGAs: 2
Running time: 13h51m
Getwork interval: 15 secs
Chain 0:
  Accepted: 1633
  Rejected: 24 (1.45%)
  Invalid: 57 (3.33%)
  Accepted hashrate: 140.65 MH/s
  Hashrate w/ rejects: 142.71 MH/s
Chain 1:
  Accepted: 1566
  Rejected: 51 (3.15%)
  Invalid: 60 (3.58%)
  Accepted hashrate: 134.88 MH/s
  Hashrate w/ rejects: 139.27 MH/s
Total hashrate for device: 275.53 MH/s / 281.99 MH/s

Mine are basically suspended on top of a giant fan right now, so they are almost chilly to the touch. Little under 300MH/s for me, but error rates are looking good  

[film2240]

I'd love for these to be mass produced and prices drop significantly for these X6500 FPGAs.If the price dropped by about 50% I would consider buying one of theses.Is overclocking possible with these (with proper cooling of course)?

[sirky]

I'd love for these to be mass produced and prices drop significantly for these X6500 FPGAs.If the price dropped by about 50% I would consider buying one of theses.Is overclocking possible with these (with proper cooling of course)?

Huh? If you have been reading at all you would see all of the talk about the different bitstreams.

And the price will probably not drop 50% anytime soon, unless you are really cozy with the people who actually make the chips and can score us a sweet deal.

[shad]

these boards are much cheaper then development boards,
we can be happy that we have access to this amazing boards

[sirky]

I grabbed the latest from github and tried to preprocess the new bitstreams, but I couldn't because I get a divide by zero error where it tries to calculate the speed somewhere.

[freshzive]

I grabbed the latest from github and tried to preprocess the new bitstreams, but I couldn't because I get a divide by zero error where it tries to calculate the speed somewhere.

I had this issue too. If you use the 0.1.1 version to load the bitstream and then mine with 0.2, it will work. For some reason the error went away here though, not really sure why

[ummas]

@film2240
1 Spartan 6 x150 costs ~175$. X6500 has them 2.
Dont count on big discount


Dont know why, but Ztex got 200Mhash from 1 spartan.
Why X6500 cant get even close to it ? Is it a hardware or software problem ??

[Qoheleth]

Dont know why, but Ztex got 200Mhash from 1 spartan.
Why X6500 cant get even close to it ? Is it a hardware or software problem ??

Ztex has better firmware - better logic to go on the chip itself. The X6500 team just recently (as in, a few days ago) got that logic working on this board, and has gotten it up to 166Mhash/s per chip. Better is possible - 200Mhash/s is possible - but requires more testing from the development team, and certainly would need better cooling than was shipped with the board.

[gmaxwell]

Nah, 166 is perfectly safe. The Ztex board for example is running at 200MHz.  Just a matter f optimizing the board to help draw heat off the chip and top cooling.
The 3 ring core right now is being designed at 161MHz. But thats (161*3)*.5 = 241.5MHs   It is not a certain thing though and still has a ways to go in dev and testing.

Nice - 241 MHs per core would be really sweet. For me at least that means I can replace a 5870 (overclocked modestly to 900 MHz) with one of these boards

I'm fairly doubtful that code is going to get released— he was looking for investors, presumably to fund a private farm with that design. So unless you're planning on duplicating the work yourself (with substantial effort since he appeared to be carefully non-specific about the solutions to the problems he's encountered) don't be counting on running anything based on a three ring design anytime soon.

[fizzisist]

I grabbed the latest from github and tried to preprocess the new bitstreams, but I couldn't because I get a divide by zero error where it tries to calculate the speed somewhere.

Strange that I never got that error, but that's why we need your guys' help to report these bugs! I pushed a new version to Github that should catch that before it happens.

Also included in the update is a new way of counting nonces reported by the FPGA which should give more information when testing these higher clock rates. It also paves the way for supporting shares with difficulty higher than one (e.g., for solo mining or p2pool).

Please let me know if this fixes that for you!