Right. Now, can you post the link to DMC portfolio?  Wait until I do the monthly report. It should come out sometime today. |
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DiabloD3, can you start publishing the fund holdings once a week?
This is not a big job and takes you about <2 minutes with google (vomit!) spreadsheet that has a live price update.
Once a month in BTC world is way too long.
I could automate it with perl, but I won't until nefario adds a read only private API. I'm not comfortable with enabling the API as long as I can't set any state changing commands to disabled. Open your https://glbse.com/portfolio I assume you use a web browser NOT called IE. Use your Ctr key + mouse pointer and select Asset column, copy this to your Google spreadsheet, repeat for Quantity column. Let the column C do the math and fetch prices (see https://bitcointalk.org/index.php?topic=85768.msg944466#msg944466 ) This will take you less time than me writing this post. Publish the spreadsheet as a web page and be done with it. Cheers! That is the exact opposite of automatic. When the market is busy, I may make buys and sells several times a day just to take advantage of the deals that pop up. It would take like 5 lines of perl to do this automatically. I am all in for automation but only when it actually makes sense. Why overcomplicate a simple task, that will take you <2 min. per week? To start hacking Perl and GLBSE API for a simple weekly report is close to pointless. Even adding div's to that report spreadsheet manually is a short and simple task of one minute or less. Total investment per week is 3 min! Lets say you frack around with this code for an hour. That's like 20 weeks worth of simple copy paste stats  An then you will have those odd situations, when connection to GLBSE craps out and you need to write and test code for that... Or only part of the data is available... etc. Well, that share trade table is completely automatic, written in Perl. And I also already wrote a script to calculate dividends semi-automatically, also written in Perl. So, whats one more? |
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Dividend day is tomorrow. I'm going to post it right after BTCMC posts theirs.
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DiabloD3, can you start publishing the fund holdings once a week?
This is not a big job and takes you about <2 minutes with google (vomit!) spreadsheet that has a live price update.
Once a month in BTC world is way too long.
I could automate it with perl, but I won't until nefario adds a read only private API. I'm not comfortable with enabling the API as long as I can't set any state changing commands to disabled. Open your https://glbse.com/portfolio I assume you use a web browser NOT called IE. Use your Ctr key + mouse pointer and select Asset column, copy this to your Google spreadsheet, repeat for Quantity column. Let the column C do the math and fetch prices (see https://bitcointalk.org/index.php?topic=85768.msg944466#msg944466 ) This will take you less time than me writing this post. Publish the spreadsheet as a web page and be done with it. Cheers! That is the exact opposite of automatic. When the market is busy, I may make buys and sells several times a day just to take advantage of the deals that pop up. It would take like 5 lines of perl to do this automatically. |
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DiabloD3, can you start publishing the fund holdings once a week?
This is not a big job and takes you about <2 minutes with google (vomit!) spreadsheet that has a live price update.
Once a month in BTC world is way too long.
I could automate it with perl, but I won't until nefario adds a read only private API. I'm not comfortable with enabling the API as long as I can't set any state changing commands to disabled. |
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I have not fully worked out the new Mh/s per bond for gigamining. Please update the results accordingly.
Have a ballpark range? I want to put something there, since Giga is the biggest mining company on GLBSE |
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Over the last week or so we have received a few messages from asset holders who believe that an issuer is in some way in violation of their asset contract. We have no interest in adjudicating these kind of disputes, nor do we believe it is our role/responsibility to do so.
However, it does seem like there should be some mechanism where asset holders can raise grievances they may have.
To that end we thought it would be good to start a discussion here to see what the community thinks would be an appropriate way of handling this type of situation.
Just fix BTCMC's contract. |
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I know what SMT is, and it only describes one core doing multiple threads simultaniously. It doesn't describe how, coarse or not. T1s, Intel P4s, Intel i*s with HT, Bulldozers, and Radeons can all be described as SMT. They just don't all do it the same way.
You seriously still not do understand what SMT is. If you have Computer Architecture: A Quantitative Approach, I suggest you go flip to the chapter on multithreading and reading it. Also look at slide 35 from this Powerpoint presentation on threading. Ultrasparc T1 cannot possibly be SMT. From wikipedia article on SMT: The key factor to distinguish them is to look at how many instructions the processor can issue in one cycle and how many threads from which the instructions come. For example, Sun Microsystems' UltraSPARC T1 (known as "Niagara" until its November 14, 2005 release) is a multicore processor combined with fine-grain multithreading technique instead of simultaneous multithreading because each core can only issue one instruction at a time. Thats an unusually strict definition of SMT. Issuing instructions from more than one thread at a time to fill load requirements over multiple ALUs is not a requirement to be SMT. |
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AMD is SMT if you look at it that way, but I look at it much finer grained than SMT: not only do you get SMT, but instructions are scheduled to run on the next free ALU. Fine grained "switch every cycle" would waste resources as ALUs would have no work to run most of the time. Intel Hyperthreading switches on block on P4s, and I think on i*s that have it they switched to every cycle. I think you have a fundamental misunderstanding of what SMT is as evidenced by the quotes above. SMT is neither fine-grained nor coarse-grained multithreading. SMT is simultaneous multithreading so there is no switching. Instructions from all threads are eligible to be issued at any given clock cycle. I wasn't arguing coarse vs fine. I was just arguing on who does what.
Niagaras really do switch on block, but the newer ones might just switch every cycle now that they have a FP unit per core instead of per socket. From Wikipedia's UltraSPARCT1 article: Each core is a barrel processor, meaning it switches between available threads each cycle. It doesn't switch on a block, it switches EVERY cycle. You can confirm this if you read Sun's architecture manuals (T1 has been open-sourced) I know what SMT is, and it only describes one core doing multiple threads simultaniously. It doesn't describe how, coarse or not. T1s, Intel P4s, Intel i*s with HT, Bulldozers, and Radeons can all be described as SMT. They just don't all do it the same way. As for T1s doing it on block, this is what Sun advertised it as. I'm not surprised their marketing department got it slightly wrong, so I'll let you have that one. |
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I'm trying to build a list of whos upgrading and whos not.
I know BTCMC, Gigamining, and BTC-Mining are, and BFLS/BFLS.RIG are going to upgrade their units. Who else is?
Edit: Results from the thread thus far:
Is upgrading:
BTCMC
Gigamining
BTC-Mining
BFLS/BFLS.RIG
NastyMining
Cognitive
PIMP
HydroMining
Maybe:
YABMC
Is not/Cant:
BitBond
GreenBTC
Let me ALL Thank You, Dalkore Which is clearly not true. |
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Updated op to reflect results so far.
BTW, if everyone can say what their estimated mh/share will be after upgrade, that'd be nice too.
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switch to the next on anything that would block execution. That's the definition of coarse-grained multithreading and I believe you're mistaken. No major processor architecture implements coarse-grained multithreading. The Ultrasparc T1/T2 switches thread on every cycle, which is the definition of fine-grained multithreading. The IBM Power series have implemented true SMT since Power5. AMD Bulldozers do the same, but have a semi-unified scheduler that schedules the next instruction (from one of two already decoded streams) onto the next ALU (2 threads -> 4 integer ALUs and 2 FP ALUs). AMD's implementation is actually SMT if you only regard the int ALU resources. The innovation they made is that they share FP resources across two cores (or they have dedicated integer resources for each core if you want to look at it that way). Radeons, however, don't switch on block. They automatically assume there is memory latency and results won't be available for four pipeline executions later. It makes the hardware simpler and easier to design compilers for. I suspect Knights Corner is more like a Radeon than a Niagara in this case.
That's fine-grained multithreading then because it's basically switching to a new thread every cycle. I wasn't arguing coarse vs fine. I was just arguing on who does what. Niagaras really do switch on block, but the newer ones might just switch every cycle now that they have a FP unit per core instead of per socket. Radeons switch every VLIW clause (which can be up to 128 instructions long) due to the unique register layout. AMD is SMT if you look at it that way, but I look at it much finer grained than SMT: not only do you get SMT, but instructions are scheduled to run on the next free ALU. Fine grained "switch every cycle" would waste resources as ALUs would have no work to run most of the time. Intel Hyperthreading switches on block on P4s, and I think on i*s that have it they switched to every cycle. I mean, what I'm trying to say is, all modern high performance archs use the same set of tricks, but its at what level do they exploit them. Its rumored that POWER in the future (9? 10?) will just be something like 64 threads piping into one core, where that one core has like 128 int ALUs and a similar number of FPUs, which is probably the future of non-lockstep highly parallel programming. |
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I see why you are confused. 2112 meant superscalar, not hyperthreaded, as pointed out by others.
I think the confusion runs deeper that just me. Here's the quote from the "Knights Corner Performance Monitoring Units"; Intel's document number: 327357-001 2. 4-Way Threaded: Each Knights Corner core is able to process 4 threads concurrently.
Xeon Phi is hyperthreaded (the vendor-neutral term for this is SMT = symmetric multithreading), but as I am sure you know SMT does not increase the performance at all of ALU-bound workloads. Therefore we can ignore SMT when making theoretical estimations of the performance of bitcoin mining. Its only hyperthreaded? Thats kinda pointless altogether. |
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Even crazier than the diff skyrocketing will be when all these ASIC's are up and running, and something within the protocol will need to be changed and all those ASIC's become useless, bringing power back to GPU & FPGA miners =P
Or btc will die out and a alt currency which employs something different in its algo will also cause BTC ASIC's to become useless. So, hold onto some of your GPU's everyone =)
People keep saying this, with no understanding of what a "change in the protocol" means. Performing a SHA256 hash is something that will not change. Someday it will change. Hopefully that will be many years in the future. *No* encryption is future-proof. I get that, but if it does ever change, it'll prolly be a switch to SHA512. That's the only way I can see an ASIC being outdated. No, SHA3, whichever candidate ends up winning. |
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I see why you are confused. 2112 meant superscalar, not hyperthreaded, as pointed out by others.
I think the confusion runs deeper that just me. Here's the quote from the "Knights Corner Performance Monitoring Units"; Intel's document number: 327357-001 2. 4-Way Threaded: Each Knights Corner core is able to process 4 threads concurrently.
Yeah, but I suspect thats the Radeon trick: have a pipeline 4 issue deep, so memory latency is effectively hid. It probably cant switch on demand. I remember reading somewhere that MIC was supposed to be barrel-threaded (ie. fine-grained multithreading), somewhat akin to Ultrasparc T1. I can't find the source now though. Thats almost the same trick. Ultrasparc T[1-4]s and newer IBM POWERs have multiple thread decoders, and switch to the next on anything that would block execution. AMD Bulldozers do the same, but have a semi-unified scheduler that schedules the next instruction (from one of two already decoded streams) onto the next ALU (2 threads -> 4 integer ALUs and 2 FP ALUs). Radeons, however, don't switch on block. They automatically assume there is memory latency and results won't be available for four pipeline executions later. It makes the hardware simpler and easier to design compilers for. I suspect Knights Corner is more like a Radeon than a Niagara in this case. |
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Good idea. Done. I'm against the split, but it should be FPGA/ASIC, custom is too vague
What topics count as "custom hardware" that shouldn't be in this section? Its just non-obvious. |
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Renamed to custom hardware for now. If you think it should be split, tell me why.
I'm against the split, but it should be FPGA/ASIC, custom is too vague |
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Hey, what is Nasty's mh/share and total ghash atm? |
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I see why you are confused. 2112 meant superscalar, not hyperthreaded, as pointed out by others.
I think the confusion runs deeper that just me. Here's the quote from the "Knights Corner Performance Monitoring Units"; Intel's document number: 327357-001 2. 4-Way Threaded: Each Knights Corner core is able to process 4 threads concurrently.
Yeah, but I suspect thats the Radeon trick: have a pipeline 4 issue deep, so memory latency is effectively hid. It probably cant switch on demand. |
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I'm trying to build a list of whos upgrading and whos not.
I know BTCMC, Gigamining, and BTC-Mining are, and BFLS/BFLS.RIG are going to upgrade their units. Who else is?
Edit: Results from the thread thus far:
Is upgrading:
BTCMC
Gigamining
BTC-Mining -> 200mh/share
BFLS/BFLS.RIG
NastyMining -> 20mh/share
Cognitive
PIMP -> 20mh/share
HydroMining -> 215mh/share
MergedMining
RSM
007
Synergy
Maybe:
YABMC
Is not/Cant:
BitBond
GreenBTC
Zeta-Mining
PureMining
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