Cairnsmore1 - Quad XC6SLX150 Board

[Scared]

I've seen other people report that XC6SLX150 can achieve 220 MHash. If this is correct then BFL is no longer the least expensive solution.

BFL Single - 800 MHash @ $599 = $.75 per MHash
Quad XC6SLX150 Board - 880 MHash @ $640 = $.64 Per MHash
The cost is fairly competitive even with BFL's MiniRig 25 GHash @ 15,000 = $.60 Per MHash

Considering BFLs poor tract record this company has a great potential to become the number 1 provider of FPGA devices for the Bitcoin community.

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[ice_chill]

I've seen other people report that XC6SLX150 can achieve 220 MHash. If this is correct then BFL is no longer the least expensive solution.

BFL Single - 800 MHash @ $599 = $.75 per MHash
Quad XC6SLX150 Board - 880 MHash @ $640 = $.64 Per MHash
The cost is fairly competitive even with BFL's MiniRig 25 GHash @ 15,000 = $.60 Per MHash

Considering BFLs poor tract record this company has a great potential to become the number 1 provider of FPGA devices for the Bitcoin community.

That's the first run to see if it can Bitmine as they stated, once proven it will go up by 50% so will be $.96/Mhash

Also as they said this is for production to test and benchmark, they are not giving any guarantees that it will even do 150Mhash per chip.

[Glasswalker]

Right, but chances are it will pull at bare minimum 180MHash/chip or more (which is what the icarus does on a same speed grade LX150 chip). There is no reason the same chip would perform poorer than the currently available opensource option. And as said, there is nothing stopping their professional dev team from improving performance further as well.

If they can see 50% improvement in speed with a new bitstream, then the 50% price improvement still keeps them on-par with the price/performance ratio that BFL has, but with a better power efficiency, which is awesome

I'm very excited to see where this goes.

[TheLittleDuke]

Of course on the day that order 9 more BFL's !

LOL -- lots of time to cancel that order when they don't deliver as promised (4-6 weeks)

[wknight]

Very nice to see someone stepping up!

[rjk]

If you need a finished, packaged, in-the-box solution to accepting bitcoins, I can recommend http://bit-pay.com/ as a merchant solution with reasonable fees. Items can be priced in coins or in fiat, and the proceeds from a bitcoin sale can be deposited directly into your bank account as fiat. You even have the option to split the output and get your cost in fiat, and the profit in raw bitcoins.

[Hpman]

Four USB ports per port   Is it possible to handle all four FPGAs with one USB Port like the Ztex quad. Icarus and X6500 uses also only 1 port for 2 FPGAs. Would prevent some wire tangle

Hpman

[tgmarks]

Four USB ports per port   Is it possible to handle all four FPGAs with one USB Port like the Ztex quad. Icarus and X6500 uses also only 1 port for 2 FPGAs. Would prevent some wire tangle

Hpman

I was under the impress it could still be ran though a single port, but could be split if desired.  4 cables per board would get ridiculous quick.

[yohan]

The FT4232 interface is physically a single USB but appears as 4 com ports on a PC. That's a com port per FPGA. There are a few other ways this interface can be used by com port way is simple.

[cyberlync]

watching

[sadpandatech]

How are you able to produce these boards for such a low cost? Compared to ZTEX and the other alternatives.

I'd imagine some of the price differnce is related to mark up, or the lack there of.

subbed.

[sadpandatech]

Question, Yohan.

What frquency do those -2 speed grade run at?

[mem]

The FT4232 interface is physically a single USB but appears as 4 com ports on a PC. That's a com port per FPGA. There are a few other ways this interface can be used by com port way is simple.

Nice setup, placing my order Meow.

[truckingeek]

Sub!

Gorgeous idea, looking forward to some CAD renderings.

Out of curiosity, I've been mulling the idea of perhaps a hundred LX150s run by an ARM9 and stuck into a 1U pizza box chassis.  Pretty sure even an anemic ARM can handle a hundred 9600bps serial ports and an Ethernet connection to the outside world, and perhaps configuration via serial port for security...ideas?

[yohan]

The speed that a FPGA will run at highly depends on the designer of the logic and the tools that synthesis, map and place and route the design. As such the only absolute thing you can say until a design is built and tested are the guaranteed specs from Xilinx. Those won't tell you how fast a design will run only speciified timing guarantees of various elements. Now most Bitcoins already push FPGAs, GPUs etc. beyond specification already so you all know that specification doesn't tell you everything.

For not so light reading look at http://www.xilinx.com/support/documentation/data_sheets/ds162.pdf and you can follow some of the following. if you head starts hurting do feel free to stop reading.I will mention a few things that might be of interest but bear in mind the paragraph above.

Starting with the clock tree specification in -2 is 375MHz max, -3 is 400MHz, -3N is 400MHz. That is the limit specification most logic won't run as fast as that as there routing delay, maybe multiple lut delays, all between registers. So what is actual the difference between the grades. It's not the limit spec but actually a range that various with a bunch of batch related things. Xilinx don't make a -2 or -3 as such they make a XC6SLX150 die which is graded into speed grades. Die performance has a statistical link to where on a wafer (usually large round thing with hundreds or thousands or dies on it) a die is, the processing (slight variations), and even the starting raw wafer quality. Out of all that you get a pile of dies with performance that typically follows a statistical curve that looks like an inverted bathtub. Somewhere along that curve Xilinx has drawn some lines that create bands that are speed grades. Remember the profile shape most die will be close together on the big lumpy part of the curve and somewhere at the top of that lump is the line that seperates -2 from -3. Most of the -3 yield will be close to the top of the -2 yield area. It's then a matter of luck what end of the -2 grade you are in but statistically near the middle is likely.The -3 is very likely to be close to the top of -2. So out of this your -2 is highly likely to mid point between the the -2 limit and -3 limit and -3 chips is likelyto be on the -3 limit.

I will mention the -3N grade. It is a runt grade, and very misleading, that Xilinx created because they had a die yield issue on memory controllers in S6. It should have been called -2N because most of the guaranteed specs are the same as -2. I think the clock tree is virtually the only one the same as -3. So our competitors selling -3N are probably not any faster than the -2 we are currently using.

Ok now that your head is spining lets make that slight simplier. I will take one of the timing parameters Tilo from the datasheet which is the propagation through a LUT your basic building block and very important to Bitcoin logic speed. A -3 has 0.21nS max, -3N has 0.26nS max and -2 has 0.26nS max. Notice the -3N time. So from this an average -2 is likely to be 0.235nS and -3 0.26nS from what I said above. In reality they are probably closer but lets work with these numbers. That says a -2 is 90% of the speed of a -3 and yes the -3 is quicker. However for that 10% more you will pay 25-50% more for the chip typically. Now for Bitcoiners there is something more of relevance to say on this and it's from knowledge gained over many years and not a spec. Generally faster grade chips will burn more static power than the slow chip. In temperature limited Bitcoining that will either reduce the benefit of -3 speed or mean you spend more on electricity and cooling.

[Keninishna]

decided to place my order with these guys instead of getting a bfl mini rig. I hope I choose right!

[ice_chill]

So if Bitcoin goes down, these boards can be reused for something else ? or resold for atleast half price of manufacturing cost £200 ? Am I correct ?

[yohan]

It's true boards could be used for some other purpose probably a processing task. However as this boardis cost optimised this will restrict usage to very similar processing tasks.

As to value that is only what someone else will pay. As yet there isn't any significant trading in second user FPGA boards so it's hard to say what value there might be. Also whilst FPGAs have a long production life there tends to be a replacement family every 2-3 years that is faster and bigger and that usually devalues the previous family to some degree. This is probably not as extreme as a GPU devaluation but it's a fact of life.

You might ask the same question of something like the BFL processors where there is almost no chance of reuse unless some technical details appear aboput the insides of them.

[bulanula]

So if Bitcoin goes down, these boards can be reused for something else ? or resold for atleast half price of manufacturing cost £200 ? Am I correct ?

I found FPGA boards very useful as back scratchers but as always YMMV !

This is the best FPGA for Bitcoin right now.

I still say wait for Lancelot and also the mystery FPGA that matthewh3 is touting !

[Turbor]

This is the best FPGA for Bitcoin right now.

Which FPGA are you talking about ? I can't see any ! I prefer guys like ngzhang and ztex building and testing a product first, then come here to advertise and sell it.