FPGA development board "Lancelot" - accept bitsteam developer's orders.

[Syke]

And again dual SHA-256 is a dream assignment for the beginners. It is small and it takes only about 64 or 128 simulated clocks to verify the entire custom circuitry. From my past experience with SPICE and BSIM4 I would venture to guess that I could simulate one clock cycle of an entire SHA-256 round on my Core2Duo laptop in one day.

The additional benefit for the team is that they have design closure achieved from the moment they pass automated DRC verification. All timing and power targets are soft, they have absolutely no interoperability requirements and any hard targets for timing closure or power closure. All they have to do is pick an  internal clock generation cell with variable multiplier.

I would guess that the chances of a "zero yield" first spin are atypically low for this design.

Since SHA-256 is so easy, why was BFL's FPGA power&performance estimates off by a factor of 5?

[2112]

Since SHA-256 is so easy, why was BFL's FPGA power&performance estimates off by a factor of 5?

I'm going to guess that they made the same mistake as the open source designers from another thread.

Since the design is so easy to get functionally correct they didn't bother to create the testbench for simulation and didn't run the full timing simulation.

Then they saved additional time by doing the probabilistic static power estimation, not the accurate power estimation that is driven by the simulation results from the testbench.

I'm also not sure about Altera's licensing and pricing model. There may be an additional license charge for the post-simulation power analyzer.

[mrb]

Since SHA-256 is so easy, why was BFL's FPGA power&performance estimates off by a factor of 5?

I know I am nitpicking, but they were off by "only" a factor of 4... A single draws 66W(*) from the 12V input --ignoring inefficiencies of the power adapter-- and 62W without counting the 2 (or sometimes 3) fans.

(*) Average measured from my batch with a clamp meter.

[pieppiep]

4 times the power and 20% less speed iirc, combined a factor of 5 in Mh/$

[mrb]

4 times the power and 20% less speed iirc, combined a factor of 5 in Mh/J (mrb: fixed unit)

Nope.

Announced: 1Gh/s at 20W = 50 Mh/J
Actual: 832Mh/s at 66W = 12.6 Mh/J

Difference in efficiency per Joule is a factor of 4. (Again I am not counting the power adapter inefficiencies which bumps the 66W to 80W or so at the wall).

[2112]

I think what you are saying is a sha-256 asic is fairly simple and they should get it right the first time ?

Yeah. This is pretty much a student project.

So, in this arena - price wise what would be a very reasonable estimate of how much it would cost BFL?
(so I know if the major effort to very slightly possibly invalidate sha256 would be worth the while to kill their company)

No idea. I always worked in a long-term R&D teams. I don't know anyone who does merchant one-shot jobs.

[arklan]

me thinks we got slightly off topic here...

Zhang, how's things with lancelot?

[ngzhang]

ok, report is here:
good news:
fixed all small bugs on the present Lancelot PCB, waiting for heat-sink sample for a final check. will push it to production stage. that means Lancelot will come out in batch in ~3 weeks. 
bad news:
bitsteam build meet with some difficulties. no ETA can be  estimate. 

should i make Lancelot as a hardware platform only? you know there are a mass of 3-rd party mining bitsteams, and running really fast. is it good for me to sell Lancelot at a extreme low price and cooperate with those bitsteam makers?  Lancelot have the best power module(14A continuous and 25A peak, 85% efficiency, for each FPGA) and  encryption support (eFuse key  storage and volatile memory key storage). and opensourced. 


about the mining ASIC:

it's really easy to make a mining ASIC, but hard to make a "good" mining ASIC. that's  my point of view.

PS: please feel free to discuss or off topic in my thread. i'm a chinese and in chinese forums, all threads are off topic. it's  a usually situation for me. 

[seriouscoin]

ok, report is here:
good news:
fixed all small bugs on the present Lancelot PCB, waiting for heat-sink sample for a final check. will push it to production stage. that means Lancelot will come out in batch in ~3 weeks. 
bad news:
bitsteam build meet with some difficulties. no ETA can be  estimate. 

should i make Lancelot as a hardware platform only? you know there are a mass of 3-rd party mining bitsteams, and running really fast. is it good for me to sell Lancelot at a extreme low price and cooperate with those bitsteam makers?  Lancelot have the best power module(14A continuous and 25A peak, 85% efficiency, for each FPGA) and  encryption support (eFuse key  storage and volatile memory key storage). and opensourced. 


about the mining ASIC:

it's really easy to make a mining ASIC, but hard to make a "good" mining ASIC. that's  my point of view.

PS: please feel free to discuss or off topic in my thread. i'm a chinese and in chinese forums, all threads are off topic. it's  a usually situation for me. 

If you have difficulty with the bitstream, you should work with third party bitstream a deal. And ship Lancelot in a complete working package. Thats the only solution. If you're shipping bare card there will only be a handful of customers.

You need to act quick because mini-rigs are already shipping. If the end product doesnt result a margin that you expected, its wise to cancel it.

Dont rush to production stage without having the bitstream issue sorted out.

Also, i already see your expected price of the Lancelot to be a bit high.

[wildemagic]

bitsteam build meet with some difficulties. no ETA can be  estimate. 

should i make Lancelot as a hardware platform only?

Fine if the hardware is well priced, perhaps with the icarus bitstream in there to get things going.
Dont ship without a bitstream, at least something with expected performance of 400Mhash/sec.

kind regards

[pieppiep]

PS: please feel free to discuss or off topic in my thread. i'm a chinese and in chinese forums, all threads are off topic. it's  a usually situation for me. 

How is the weather over there? It's rainy over here in the Netherlands.

[disclaimer201]

PS: please feel free to discuss or off topic in my thread. i'm a chinese and in chinese forums, all threads are off topic. it's  a usually situation for me. 

How is the weather over there? It's rainy over here in the Netherlands.

No good start of the summer here in Berlin, either. I would be very much interested in buying one or two FPGAs though that I just need to plug in and press go. Preferably the fancy and cost-efficient Lancelot one.

[luffy]

dear friend,
i am afraid that FPGA in 6 months time will turn obsolete! (ASIC time)
i wonder if you should put your efforts to openASIC or other ASIC project!

[ngzhang]

dear friend,
i am afraid that FPGA in 6 months time will turn obsolete! (ASIC time)
i wonder if you should put your efforts to openASIC or other ASIC project!

  let's see what will happen in the next 6 months.

[Dexter770221]

dear friend,
i am afraid that FPGA in 6 months time will turn obsolete! (ASIC time)
i wonder if you should put your efforts to openASIC or other ASIC project!

  let's see what will happen in the next 6 months.

Yep. We will see. I still can't wait to order Lancelot...

[David_Benz]

And these are worthless too!  Thanks asic!

[Garr255]

dear friend,
i am afraid that FPGA in 6 months time will turn obsolete! (ASIC time)
i wonder if you should put your efforts to openASIC or other ASIC project!

  let's see what will happen in the next 6 months.

BFL is supposed to be taking preorders today. ASICs are bringing huge changes to Bitcoin, ones that could even effect non-miners. I believe all of these changes will be for the best in the long run though. Now we can just hope that the openasic project turns something out in the next few months!

[Raize]

BFL is supposed to be taking preorders today. ASICs are bringing huge changes to Bitcoin, ones that could even effect non-miners. I believe all of these changes will be for the best in the long run though. Now we can just hope that the openasic project turns something out in the next few months!

Yes, and they took preorders in Bitcoin primarily, and some estimates now put the amount of Bitcoin trying to be cashed out by their processor at $300,000 worth, which may be difficult for them to process in the near future. Since these preorders cannot be reversed and the estimated cost for an ASIC run is $3-5 million for all three devices and the time for development could be as long as 6 months or more, there is a very high likelihood we may see BFL not have enough money to do ASIC development for several months and the ASIC itself for several more months. In all, it could easily be a year or more before ASIC drops.

I think FPGA devices still have some play, but obviously these are all things to consider when ordering or implementing new designs. I know I would still buy Lancelots if they were developed, though I'd probably still prefer a quad-miner of some sort.

[disclaimer201]

What does the developer say? Do you have a solution for the bitstream yet? I'd love to buy one or two Lancelots rather sooner than later. Do you think it's risky to invest in FPGAs now? I'm not so worried about the energy efficiency but to achieve a high hash rate in order to still be able to compete at all with ASICs next year. I'm assuming the time for ROI is more than one year, or isn't it?

[ngzhang]

BFL is supposed to be taking preorders today. ASICs are bringing huge changes to Bitcoin, ones that could even effect non-miners. I believe all of these changes will be for the best in the long run though. Now we can just hope that the openasic project turns something out in the next few months!

Yes, and they took preorders in Bitcoin primarily, and some estimates now put the amount of Bitcoin trying to be cashed out by their processor at $300,000 worth, which may be difficult for them to process in the near future. Since these preorders cannot be reversed and the estimated cost for an ASIC run is $3-5 million for all three devices and the time for development could be as long as 6 months or more, there is a very high likelihood we may see BFL not have enough money to do ASIC development for several months and the ASIC itself for several more months. In all, it could easily be a year or more before ASIC drops.

I think FPGA devices still have some play, but obviously these are all things to consider when ordering or implementing new designs. I know I would still buy Lancelots if they were developed, though I'd probably still prefer a quad-miner of some sort.

we (my team and some other core people) consider BFL have not spend any money on ASIC development yet. BFL's business flow is: announce dreamlike specs -> taking pre-orders -> find people to development -> if succeed, release and shipment. if fail, run. BFL sell products at super low price because their customer take all risks.
so now BFL is just collecting money for their ASIC project and avoid current delivery pressure (means they are running out cheap FPGAs).
if this business model succeeded, i will classified this as a shame of human intelligence.

and let me explain what is the "now in final stage development" mean. in ASIC design flow, this means RTL design is nearly finish. as a SOC or some other complex ASIC, RTL design and testing will take most of the development time. but mining ASIC is not a RTL complex design, it is a high computing density chip. most of the work is physical design, packaging and thermal design. RTL is less than 10% of the entire work.

What does the developer say? Do you have a solution for the bitstream yet? I'd love to buy one or two Lancelots rather sooner than later. Do you think it's risky to invest in FPGAs now? I'm not so worried about the energy efficiency but to achieve a high hash rate in order to still be able to compete at all with ASICs next year. I'm assuming the time for ROI is more than one year, or isn't it?

nearly finish.
the price will let the ROI in ~6 months.