Bonam
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September 10, 2014, 11:35:45 PM |
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If deployment began in July as stated, the process of domination is well under way.
If "domination" was under way, I am guessing someone (friedcat or a board member) would have announced it. People are usually tight lipped when news is bad or perhaps neutral, not when awesomeness is going on.
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KarmaShark
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September 11, 2014, 12:15:22 AM Last edit: September 11, 2014, 01:19:50 AM by KarmaShark |
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If deployment began in July as stated, the process of domination is well under way.
If "domination" was under way, I am guessing someone (friedcat or a board member) would have announced it. People are usually tight lipped when news is bad or perhaps neutral, not when awesomeness is going on. Not necessarily. AM could be well on it's way to holding a 10%+ share of the network. It could also be true that to date the self-mining income has been converted to fiat to bring the company into a cash-flow positive position. FC may want to keep the eyes of the public away from the hash rate until income exists to pay out to shareholders. Otherwise, there will be a lot of initial excitement from the fact self-mining indeed has been operating since July to downright anxiety over when all those mined coins will start making their way to shareholders. "When are we going to go over 5%? We've been stuck there for over two weeks now!"
"We can all see clearly you are hashing away, so where are the dividends???" What are you doing with our coins??"Questions like these can be avoided by employing this method. That being said, at some point in 2014 something will have to eventually give. No one will believe the company will have been self mining from mid-summer into the winter without something tangible to show or report on. I think shareholders would be happy to know whether Gen3 will bring in anything other than the funding for Gen4. Given that income from Gen4 sales is likely sometime in early 2015, shareholders would have something to look forward to at the very least. The board members indicated that things are progressing along as expected, so I can only assume we have some good news that will see the light of day sooner than later.
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Chris_Sabian
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September 11, 2014, 01:20:06 AM |
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Prediction: No dividends before gen4 is taped out, tested, and friedcat is satisfied with the result.
If gen4 fails to satisfy friedcat, the funds that could have been used to pay out dividends will be used for a contingency plan.
This would be a reasonable thing to do. It might also partially explain why no divs have been paid out in August: Funds are being retained a bit longer, in case the imminent tape-out of gen4 fails or fizzles.
Disclaimer: I'm pulling this theory out of my ass.
This is a reasonable idea. And a good business decision as well. That would be horrible for shareholders. You do know how much time passes from tape-out till you can actually test the chip? No. I actually don't.
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jdany
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September 11, 2014, 01:28:26 AM |
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From what I remember, only 33% was necessary to fund future development and 66% was to be returned to shareholders. Am I wrong?
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TheJuice
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September 11, 2014, 02:14:21 AM |
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From what I remember, only 33% was necessary to fund future development and 66% was to be returned to shareholders. Am I wrong?
I for one like am end game plan. Soon there will be 1 dominate chip. Let's home it's am at 0.3w/gh
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jjdub7
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September 11, 2014, 03:33:22 AM |
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Two general questions orthogonally related to AM -
I know we're talking CPU vs. SHA-256, but strategic question time:
- where does the manufacturing tech that AM has access to match up to where Intel is now (commercial generalized/versitile CPU semiconductors)
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- how/in what ways does generalized semiconductor/circuitry technology scale to both the SHA-256 process and the market for ASIC technology in general (within the realm of cryptographic computing)?
Additionally, when the price recently shot up to the 0.3 range on the exchanges, iirc it was largely the result of high density trading timestamped over a period of minutes, followed by a few lesser but still significant buy-ins. Anyone else notice that/have any musings?
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Adrian-x
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September 11, 2014, 05:05:31 AM |
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Two general questions orthogonally related to AM -
I know we're talking CPU vs. SHA-256, but strategic question time:
- where does the manufacturing tech that AM has access to match up to where Intel is now (commercial generalized/versitile CPU semiconductors)
and
- how/in what ways does generalized semiconductor/circuitry technology scale to both the SHA-256 process and the market for ASIC technology in general (within the realm of cryptographic computing)?
Additionally, when the price recently shot up to the 0.3 range on the exchanges, iirc it was largely the result of high density trading timestamped over a period of minutes, followed by a few lesser but still significant buy-ins. Anyone else notice that/have any musings?
I don't understand what you're asking so I'm going to answer what I think you may be asking. First ASIC is an Application Specific Integrated Circuit so an Intel CPU or a ram chip is an ASIC. SHA256 processor chips do one thing and one thing only and that is process SHA256 calculations so there is no other allocation for them, well they do one other thing, they turn electricity into heat very efficiently. The higher the chip density the smaller the circuit, the less energy is needed to do the same calculations. AM has access to the same tech as Intel, there are few first tear manufacturers who can make 22nm chips. Who gets access to the production line depends on who provides the most business, AM are small fry, their first chip was 130nm (it's a scale of circuit that has lots of competition - lots of suppliers so low overhead low barrier to entry. Know once you make a chip you can't change it, make a change without ordering and your suppliers put you at the back of the que and will unlikely rush another job for you ever. The success of the first AM chip lead to the abandoning of the the second and production of the 3rd @ 40nm so still 5 levels of innovation away from the 14nm the latest tech. (The more dense the more important heat disillusion becomes - so while AM aren't the smallest they have less heat dissipation issues - still a lot of improvement can be made on the heat sink design.) I'd go so far as to say there are no other applications for these chips other than mining PoW SHA256 coins, so little to no applications within the realm of cryptographic computing. No idea on the trading.
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Thank me in Bits 12MwnzxtprG2mHm3rKdgi7NmJKCypsMMQw
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Bonam
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September 11, 2014, 05:10:38 AM |
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Two general questions orthogonally related to AM -
I know we're talking CPU vs. SHA-256, but strategic question time:
- where does the manufacturing tech that AM has access to match up to where Intel is now (commercial generalized/versitile CPU semiconductors)
and
- how/in what ways does generalized semiconductor/circuitry technology scale to both the SHA-256 process and the market for ASIC technology in general (within the realm of cryptographic computing)?
These questions make no sense as phrased. The words can all be understood, but strung together as you have them, they are meaningless.
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drasted
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September 11, 2014, 05:29:46 AM |
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First ASIC is an Application Specific Integrated Circuit so an Intel CPU or a ram chip is an ASIC.
Intel CPUs are general purpose, not ASICs
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jjdub7
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September 11, 2014, 05:36:51 AM |
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Two general questions orthogonally related to AM -
I know we're talking CPU vs. SHA-256, but strategic question time:
- How far behind Intel's 14nm tech is ASICMINER for SHA-256 (as opposed to CPU-type tech) relative to companies like KnCMiner's 20nm chips (in terms of the research curve)? - How do the processes required (regardless of the cost) for wafering scale when wafering CPU chips vs. SHA or other encryption-based ASICs? For example, if Intel is able to use ion lithography and AM is unable to gain access to this manufacturing technology for SHA ASIC manufacturing, what are the limiting factors that prevent them from doing so? - What is the fabrication process, how does it compare between processor/circuit types? - Why do SHA-256 chip producers alone have so much variance between the node lengths of their chips (i.e. why is AM only at the 28/45nm stage?), and what factors still allow them to be profitable (e.g. cheap manufacturing, cheap design, bulk ordering, resale margins/transfer costs) at the chip market level? - What does the general technology roadmap look like for ASIC manufacturers in the SHA-256 market? As a point of reference, how might this compare to the Scrypt market, and what technological factors or challenges (i.e. those other than the market value of related coins) are specific to circuit design between these algorithms vs. CPUs? These are the questions I'd like answered if we get another Q&A with FC. If anyone else can give opinions on AM-specific content based on past performance, feel free. Two general questions orthogonally related to AM -
SHA256 processor chips do one thing and one thing only and that is process SHA256 calculations so there is no other allocation for them, well they do one other thing, they turn electricity into heat very efficiently. The higher the chip density the smaller the circuit, the less energy is needed to do the same calculations. AM has access to the same tech as Intel, there are few first tear manufacturers who can make 22nm chips. Who gets access to the production line depends on who provides the most business, AM are small fry, their first chip was 130nm (it's a scale of circuit that has lots of competition - lots of suppliers so low overhead low barrier to entry. The success of the first AM chip lead to the abandoning of the the second and production of the 3rd @ 40nm so still 5 levels of innovation away from the 14nm the latest tech. (The more dense the more important heat disillusion becomes - so while AM aren't the smallest they have less heat dissipation issues - still a lot of improvement can be made on the heat sink design.) I'd go so far as to say there are no other applications for these chips other than mining PoW SHA256 coins, so little to no applications within the realm of cryptographic computing. Good info, thanks. Right, its obvious that their chips don't have any other application beyond hashing blockchains, but keep in mind with IBM's/IBM Global Consulting's new "internet of things" cloud framework ( http://www.coindesk.com/ibm-sees-role-block-chain-internet-things/), its not necessarily that the chips can do one thing anymore, but rather that SHA-256 can do a lot of things, and decentralized at a fraction of the cost of current vendors. Thanks Bonam for the "2nd Draft" button.
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Bonam
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September 11, 2014, 05:57:21 AM |
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Thanks Bonam for the "2nd Draft" button.
- How far behind Intel's 14nm tech is ASICMINER for SHA-256 (as opposed to CPU-type tech) relative to companies like KnCMiner's 20nm chips (in terms of the research curve)? AM chips are currently 40 nm. That can be considered "3 generations" behind 14 nm processes. The process size of gen 4 has not been disclosed as far as I know. - How do the processes required (regardless of the cost) for wafering scale when wafering CPU chips vs. SHA or other encryption-based ASICs? For example, if Intel is able to use ion lithography and AM is unable to gain access to this manufacturing technology for SHA ASIC manufacturing, what are the limiting factors that prevent them from doing so? The main factors are scale and cost. To use the very latest manufacturing technologies, investments in the hundreds of millions - billions are required. AM can clearly not make these investments. No semiconductor production plant will take the time to set up a billion dollar cutting edge machine that can be cranking out premium chips for Intel for a side job for a few hundred k. - What is the fabrication process, how does it compare between processor/circuit types? Research is heavily focused on EUV lithography (using 13.5nm light), while current advances in manufacturing have mainly been relying on multi-patterning. There is also research in electron beam lightography. You'd likely have to talk to an industry expert for details on how/if different lithographic techniques are applied to different types of integrated circuits. I would guess that the primary determinant of the technique used is the desired feature size. - Why do SHA-256 chip producers alone have so much variance between the node lengths of their chips (i.e. why is AM only at the 28/45nm stage?), and what factors still allow them to be profitable (e.g. cheap manufacturing, cheap design, bulk ordering, resale margins/transfer costs) at the chip market level? Bitcoin mining ASIC manufacturers started with very limited capital and had to use very cheap lithographic techniques, that is, ones many generations old, hence use of 65nm - 100nm+ processes in 1st generation offerings from various companies. As companies have made profits from first generations, those have been re-invested into more advanced and more expensive chips. However, the process size is not the only determinant of chip efficiency, as there are many ways to optimize a chip on a hardware level in terms of power consumption, computation performance, heat dissipation, etc. None of the ASIC manufacturers have reached anywhere close to the theoretical limits of performance of an SHA256 ASIC at a given process size, and so it is possible to be competitive with larger process sizes by having a better optimized chip. Additionally, production cost and other expenses that determine the sale price of chips have a major impact on competitiveness. - What does the general technology roadmap look like for ASIC manufacturers in the SHA-256 market? As a point of reference, how might this compare to the Scrypt market, and what technological factors or challenges (i.e. those other than the market value of related coins) are specific to circuit design between these algorithms vs. CPUs? Bitcoin mining ASIC development has benefited from being able to quickly skip through the generations of processes in a very short time. Those easy performance gains are about to come to an end as many manufacturers are hitting the 20 nm range, near the technological cutting edge. From there on out, they'll have to wait for technology to advance to benefit from any further size reductions and will have to focus on design optimization and cost control.
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hdbuck
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September 11, 2014, 06:19:05 AM Last edit: September 11, 2014, 07:59:24 AM by hdbuck |
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According to canary, gen4 is 28nm. I think the be200 chip is 40nm. Anybody know what the be300 chip will be? 28nm, 20nm...
28 Edit: intel is only about to release its 14nm chip: http://www.itpro.co.uk/mobile/22111/intel-broadwell-core-m-release-date-set-for-octoberIntel's tic-toc innovation process: ![](https://ip.bitcointalk.org/?u=http%3A%2F%2Fwww.insidehardware.it%2Fimages%2Fstories%2Farticoli%2Fintel-i7-4770k%2Fintel-tick-tock--ivy-bridge-haswell.jpg&t=665&c=-aa9pZwyok58Tg) Intel's manufacturing road map: ![](https://ip.bitcointalk.org/?u=http%3A%2F%2Fwww.cdrinfo.com%2Fimages%2Fuploaded%2FIntel_ManufacturingNode_Roadmap.jpg&t=665&c=ow3XlDbtUzGv3A) Moore law should reach its thermodynamic limit at around 5 nm. After that, other technology than transistors, such as photonics, optoelectronics or carbon nano-tubes should take on. Here is a figure i've done for my dissertation (More Moore vs More than Moore): ![](https://ip.bitcointalk.org/?u=https%3A%2F%2Fi.imgur.com%2FBms1pes.png&t=665&c=QH0pZkSHuQA__A) Beyond leakage and Lithography, there is a long list of mounting difficulties for the industry to continue to deliver Moore's Law. Virtually, no process step is exempt from challenges: material challenges for interconnect layers will surface soon, similar to those described for transistor layers, the increase in power density poses material challenge as well, as do metrology, test, defect detection and measurement of smaller and 3D structures. If none of these barriers appear insurmountable, their combination is clearly changing the economic side of Moore's Law and increasing the chances of roadmap slippage and slower node transitions So in fact, i dont think we will see 14nm ShA ASICs or even 22nm before some long time (all things being relative, and as opposed to how fast they catched up with the 28nm technology). It's just too expensive and they yet have to improve and squeeze the 28nm designs out there first, which should take a year or two imho. Crossing fingers for Gen4 to be good and compete well. ![Smiley](https://bitcointalk.org/Smileys/default/smiley.gif)
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jjdub7
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September 11, 2014, 07:09:08 AM |
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...
A very well-read and well-relayed response - solid overview, thanks.
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rudi
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September 11, 2014, 07:11:37 AM |
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Prediction: No dividends before gen4 is taped out, tested, and friedcat is satisfied with the result.
If gen4 fails to satisfy friedcat, the funds that could have been used to pay out dividends will be used for a contingency plan.
This would be a reasonable thing to do. It might also partially explain why no divs have been paid out in August: Funds are being retained a bit longer, in case the imminent tape-out of gen4 fails or fizzles.
Disclaimer: I'm pulling this theory out of my ass.
This is a reasonable idea. And a good business decision as well. That would be horrible for shareholders. You do know how much time passes from tape-out till you can actually test the chip? No. I actually don't. Me neither, but I'd like to know. Why does it have to be longer than a few weeks?
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Fortega
Full Member
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bitcoinAdd.net
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September 11, 2014, 07:15:40 AM |
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...
A very well-read and well-relayed response - solid overview, thanks. Too bad his signature ruins it all.
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vortex1878
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September 11, 2014, 07:24:47 AM |
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Prediction: No dividends before gen4 is taped out, tested, and friedcat is satisfied with the result.
If gen4 fails to satisfy friedcat, the funds that could have been used to pay out dividends will be used for a contingency plan.
This would be a reasonable thing to do. It might also partially explain why no divs have been paid out in August: Funds are being retained a bit longer, in case the imminent tape-out of gen4 fails or fizzles.
Disclaimer: I'm pulling this theory out of my ass.
This is a reasonable idea. And a good business decision as well. That would be horrible for shareholders. You do know how much time passes from tape-out till you can actually test the chip? No. I actually don't. Me neither, but I'd like to know. Why does it have to be longer than a few weeks? For AM's Gen3 tape-out happened around mid to late January 2014. Testing was done on March 28th/29th. So that was approx. 8-9 weeks from tape-out (which is very quick). I am not an expert in this field but others stated that this normally takes a minimum of 3 months. EDIT: To avoid any misunderstandings: http://en.wikipedia.org/wiki/Tape-out
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jjdub7
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September 11, 2014, 07:44:04 AM |
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Also, once mining numbers are released, can we get a count on the total number of BTC produced by AM, and (though highly unlikely more than an estimate) BTC produced by AM-built hardware? These numbers are easy for both investors and customers to understand, and it shouldn't take more than a day to come up with those numbers.
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VeeMiner
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September 11, 2014, 08:06:12 AM |
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Also, once mining numbers are released, can we get a count on the total number of BTC produced by AM, and (though highly unlikely more than an estimate) BTC produced by AM-built hardware? These numbers are easy for both investors and customers to understand, and it shouldn't take more than a day to come up with those numbers.
what would you want that number for? Apart from having an interesting statistic...
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rudi
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September 11, 2014, 08:18:52 AM |
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Prediction: No dividends before gen4 is taped out, tested, and friedcat is satisfied with the result.
If gen4 fails to satisfy friedcat, the funds that could have been used to pay out dividends will be used for a contingency plan.
This would be a reasonable thing to do. It might also partially explain why no divs have been paid out in August: Funds are being retained a bit longer, in case the imminent tape-out of gen4 fails or fizzles.
Disclaimer: I'm pulling this theory out of my ass.
This is a reasonable idea. And a good business decision as well. That would be horrible for shareholders. You do know how much time passes from tape-out till you can actually test the chip? No. I actually don't. Me neither, but I'd like to know. Why does it have to be longer than a few weeks? For AM's Gen3 tape-out happened around mid to late January 2014. Testing was done on March 28th/29th. So that was approx. 8-9 weeks from tape-out (which is very quick). I am not an expert in this field but others stated that this normally takes a minimum of 3 months. EDIT: To avoid any misunderstandings: http://en.wikipedia.org/wiki/Tape-outTape-out of gen3 was sometime in February, though I think we never got a confirmation on the exact date: The tapout date is pulled back to early Feburary due to further modifications for robustness and stability, but mass delivery date is still March.
So it seems that AM was very quick indeed in that respect. Something else that I haven't seen mentioned in a long time is the following: 4) The next gen chips, BE300, are likely to be compatible with BE200 with respect to pinouts and package. Therefore all efforts on BE200 based designs are always useful in the long term.
To me, this means that the transition from gen3 products to gen4 products should be quite fast as well.
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vortex1878
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September 11, 2014, 08:23:57 AM |
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Thanks for the correction, rudi. In fact I had pulled the tape-out date from my memory. But testing date is accurate. Still 8 weeks from tape-out to testing though.
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