<[7]> tbh I just discovered this channel by accident, I wasn't even aware that it existed until a few minutes ago
[15:13] <[7]> (I'm not following labcoin discussions on the forums either)
[15:13] <[7]> so assume that I know basically nothing about the whole FUD around labcoin
[15:15] <[7]> was this channel founded by some labcoin employee, or is it community-controlled?
[15:16] <dexX7> baseline is: a lot of broken promises, most notably "we are hashing right now at 2-4 th/s, dividend will be payed then and then", one week later "we start hashing now, here is a signed empty btc address" and again no further "proof" or statement
[15:16] <dexX7> hm
[15:16] <dexX7> pretty sure it's community founded
[15:17] <dexX7> it was once used for an official q&a
[15:18] <dexX7> but since then people came back and now it's like a speculation channel about labcoin
[15:19] <[7]> it's funny how they seem to keep referring to me
[15:19] <[7]> even though I'm only really involved with their second generation hardware design, which doesn't really play a role yet
[15:19] <[7]> to make that clear, I was hired by them as a freelance consultant on bitcoin-related matters
[15:20] <[7]> and for firmware development etc.
[15:20] <Smily__> have you seen in person any phycial hardware?
[15:20] <Smily__> physical
[15:20] <[7]> no, I've worked 100% remotely until now
[15:20] <radiumsoup> until now - does that mean that's changed?
[15:20] <yesminister> how's that neobee ipo flipping coming?
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[15:20] <[7]> I'm not planning to change that
[15:20] <radiumsoup> ok
[15:20] <dexX7> who do you talk to?
[15:21] <dexX7> fabrizio tatti or sam noi?
[15:21] <Smily__> are you doing firmware for their 130nm chips?
[15:22] <[7]> I only have two contacts: alessia (via skype, some chat suggests that her husband might sometimes be using her account instead), and wang (also via skype, a chinese engineer)
[15:22] <dexX7> oh neat
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[15:22] <dexX7> so wang exists
[15:23] <[7]> yes, I've chatted with him, and he seems to have an ASIC implementation background
[15:23] <[7]> mostly HDL to ASIC synthesis
[15:23] <dexX7> i know you have real knowledge about the insides of labcoin, but do you have any idea why it turned out how it is right now?
[15:23] <[7]> from what I know he's working at a university in shenzhen
[15:23] <yesminister> how much experience does wang have?
[15:24] <radiumsoup> given what you know about the design you're a part of, and ignoring all to do with the current drama: how far off would you estimate they are from deploying the stuff you're working on? It it goins at a rate that you would expect from a mining upstart?
[15:24] <radiumsoup> *is it going
[15:25] <[7]> hard to tell how much experience he has... I don't have much myself in the ASIC domain. I know he knows his way around the basics and HDL synthesis though. not sure how much he knows about lowlevel internals.
[15:25] <yesminister> thanks
[15:25] <[7]> from what I know (I'm not really involved with that 130nm project beyond giving some generic advice), this chip will have an icarus-like interface. I have no idea what they're using as a controller for it, probably just some mining software running on a PC via a serial port or something. I haven't been asked to write firmware for that.
[15:26] <[7]> radiumsoup: things are always moving slower than expected, in every single mining business that I've seen
[15:26] <[7]> right now they're focusing on getting that 130nm thing working
[15:27] <dexX7> most of us think "we would do things much different, for example show more pictures of the hardware, don't do strange announcements or only post an empty wallet" ... is it possible that swede/labcoin-frontteam has no or only limited contact to the team behind?
[15:27] <[7]> the stuff I'm working on is nowhere near close to tapeout
[15:27] <yesminister> Have they done anything that would indicate...(I'll be direct here) that they don't know what they're doing?
[15:27] <radiumsoup> that helps, thanks
[15:28] <Smily__> from what you can see, can you in any way confirm the presense of any Labcoin ASIC hardware?
[15:28] <[7]> given that I have not much contact to the front team, and next to zero to the 130nm team, I can't really judge how communication works between them
[15:29] <[7]> I don't have any real proof that they have chips, but I have no reason to believe the contrary either
[15:29] <radiumsoup> have they always paid you on time?
[15:29] <yesminister> So they at least seem plausibly competent.
[15:29] <[7]> alessia promised to get me in touch with the people working on getting the 130nm chip to work, which is supposed to exist but have some stability problems (that sound fixable, but I don't know details yet)
[15:30] <[7]> they have paid me in a timely manner, when they responded at all. that did sometimes take a while though.
[15:30] <[7]> getting hold of alessia in skype can be tricky.
[15:31] <radiumsoup> that "fixable" problem suggests the problem is not with the chip but with the interface, would that seem accurate?
[15:31] <yesminister> is all of the engineering in china as far as you know?
[15:31] <dexX7> from a technical point of view: what might be a problem that they are facing right now? swede said it's a "software issue and team is working on pool merging (?). and: is it possible at all that they have had a working setup (alleged solo mining), but now they are facing problems that shut everything down?
[15:32] <[7]> they suggested something along the lines of the chips "crashing and rebooting" every couple of seconds, but I don't know details yet, not have I spoken to the engineer dealing with it yet. I'm also not sure how much information I may even release here, but I hope that this piece of information is more positive than the general sentiment here.
[15:32] <radiumsoup> understood, appreciate you making the effort
[15:33] <dexX7> yes, it's very valuable and appreciated
[15:33] <Smily__> Yes, THANK YOU for taking the time to come and fill us in!
[15:33] <[7]> I have only talked to Wang so far, and Alessia recently suggested that, while Wang is still working for them, someone else is in charge of fixing up the 130nm problems.
[15:33] <yesminister> how recent is that info?
[15:33] <yesminister> about the chips
[15:33] <[7]> so I guess there's a couple more engineers that I don't know of
[15:33] <[7]> he once said something suggesting there are engineers somewhere close to my time zone, so somewhere in Europe
[15:34] <yesminister> thank you
[15:34] <[7]> yesminister: 3-4 days ago or something like that
[15:34] <radiumsoup> (aside) well, if they're working at a university, they might be using grad students to do things which may be causing some of these issues... not really sure how Chinese universities work though
[15:34] <yesminister> so from your perspective it does sound like they're making a good faith best effort
[15:34] <dexX7> "crashing and rebooting chips".. is that more likely due to a chip failure, board failure or software failure?
[15:35] <[7]> I'd guess power supply failure or a bug somewhere
[15:35] <radiumsoup> might be heat because of the poor choice in packaging
[15:36] <[7]> sounds workaroundable though, at least when taking a small performance hit into account
[15:36] <dexX7> hehe ... 12.8 w in qfp44
[15:36] <[7]> yeah that's funny, but was probably the only thing quickly available for prototyping
[15:36] <dexX7> yes, probably
[15:37] <[7]> they seem to be prototyping by sneaking into some spare wafer space on university fab runs
[15:37] <yesminister> do you think that's what they used for production or just prototyping?
[15:37] <yesminister> ah
[15:37] <[7]> that university fab probably can't do more sophisticated packages cheaply
[15:37] <dexX7> so do you know if the "one" batch of chips we know about (approx 2000) is the only one they have and are more already ordered?
[15:37] <[7]> I have no idea
[15:38] <yesminister> so they may prototype on university resources and then farm out actual production
[15:38] <[7]> The honest overall picture that I have is: They're chaotic, but at least trying to release something working. No signs of any scam intent. However as we all know, an ASIC project can easily fail without a scam intent. You never know. Communication between me and them isn't working well, but I guess I'm considered low priority right now as I'm only working on the next generation.
[15:38] <[7]> yes, that seems to be the plan, to keep NRE cost down
[15:38] <radiumsoup> that's the most objective view I've seen in weeks
[15:39] <dexX7> yes, indeed
[15:39] <dexX7> right now the sentiment is: we don't know if they are trolling us
[15:39] <yesminister> yeah, good to hear
[15:39] <yesminister> i didn't think they were scamming, but I was half-afraid they were all undergrads who got a little too ambitious
[15:39] <[7]> if this is a scam, then it's a really elaborate and sophisticated one, producing a whole bunch of fake technical artifacts
[15:40] <dexX7> with blatant statements like "we advise everyone to buy cheap shares, they will tenfold"
[15:40] <dexX7> i doubt it's a scam
[15:40] <dexX7> but many things just seem very unreasonable
[15:40] <[7]> I have a feeling that investors here are a lot more mature than over at tom's project (BTCFPGA)
[15:40] <yesminister> they don't even sound hopelessly incompetent, which is good to hear. haha.
[15:40] <dexX7> oh that's just the channel here
[15:41] <[7]> I'm comparing with #btcfpga, not the other trolling around that
[15:41] <dexX7> ah i see
[15:41] <radiumsoup> here's one I've been wondering for a while - do you know if these guys have other projects they are working on, or is this their "day job"?
[15:42] <[7]> I don't have hard information on that, but I guess most people working for them are external contractors
[15:42] <yesminister> i'm actually happy to hear they might have hired engineers in europe. shows a willingness to do what they have to do.
[15:42] <dexX7> you said 65 nm is far away from tape-out and an earlier announcement of them stated "end of august, early sep for 65 nm tape-out" ... so is this statement just old or were you too lazy?
[15:42] <[7]> just like me, and I have quite a bunch of other projects, pushing this one down on my todo list from time to time
[15:43] <[7]> they never even asked me for a schedule on that
[15:43] <[7]> and they're making me write HDL code, which isn't really my area of expertise
[15:43] <dexX7> i see, so it's most likely a miscommunication with pr
[15:43] <yesminister> in your estimation is 500 th/s by the end of the year plausible?
[15:43] <[7]> which suggests that they are in lack of HDL engineers
[15:44] <[7]> does that 500th/s plan involve 65nm chips?
[15:44] <[7]> this weird TSMC document suggests they're planning to do 65nm in Q1 2014
[15:44] <[7]> and I know next to nothing about how they're planning to scale the 130nm run
[15:44] <yesminister> ok, that helps
[15:45] <cowwater> thanks for your input.
[15:45] <dexX7> hmm.. assuming their 130 nm chips do 1 gh/s-x gh/s ... it would take more than 125000 chips to get near to 500 th/s
[15:46] <yesminister> looking back, the 500 th/s plan is only 130nm
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[15:46] <yesminister> all i can see is they say the 65nm development is 'on track'
[15:47] <yesminister> but the 500 th is using 1st gen (130) chips
[15:47] <radiumsoup> keep in mind the idea was also to sell hardware, not mine it all themselves
[15:47] <[7]> hahaha. "on track". which track? I don't think they've defined one.
[15:47] <yesminister> yeah, it's the vaguest possible comment from them on it. heh.
[15:48] <[7]> I'm confident that the interface circuitry for 65nm will be finalized this year, but I have no idea who's even going to implement the hashing core.
[15:48] <[7]> if they want me to do that, it would take months, and I wouldn't be very confident that it's going to actually work well
[15:48] <yesminister> i'm clueless, how different would the design be from the 130 design?
[15:48] <[7]> it's a complete redesign from scratch. at least if their plans haven't changed.
[15:49] <[7]> while the 130nm is basically a multicore icarus clone, the 65nm is more bitfury-style
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[15:50] <[7]>
http://labcoin.com/img/base_clock_generator.png[15:50] <[7]>
http://labcoin.com/img/Hashing_core_signal_routing.png[15:50] <[7]> these figures are actually from a proposal that I made
[15:50] <[7]> which (retroactively) turns out to be fairly close to what bitfury did
[15:51] <dexX7> afaik that's from the 180 nm chip
[15:51] <[7]> as far as I know, none of that does apply to 130nm though
[15:51] <yesminister> what's "FF"?
[15:51] <[7]> it's the plan for 65nm, which is only partially implemented so far
[15:51] <[7]> a flipflop
[15:51] <[7]> (or a bunch of them)
[15:53] <yesminister> this has all been very helpful, thank you
[15:53] <dexX7> right no i have no further question, but if anyone in this channel does, i'd really appreciate asking now, because we have the chance
[15:54] <[7]> I'm working on the "Interface circuitry" box, and I have no idea who will do the rest. I likely won't.
[15:54] <yesminister> so not a scam, plausibly competent, bad at communication.
[15:54] <[7]> (even the interface circuitry is a bit beyond my level of HDL experience)
[15:54] <[7]> I'm mostly from the software / microcontroller side of things.
[15:54] <radiumsoup> without compromising the trust they have placed in you, is there anything you wish they would do that they are not doing (at the 65nm level)?
[15:54] <[7]> don't worry, I'll be idling here and respond to pings (asynchronously if I'm not available)
[15:54] <yesminister> oh, did the boards they posted pictures of look like a plausible design?
[15:55] <yesminister> some were saying they were obviously useless
[15:55] <dexX7> sec i'll get the picture
[15:55] <dexX7>
https://i.imgur.com/4yuBc9A.jpg +
https://i.imgur.com/4qqgoPD.jpg[15:56] <[7]> I've already asked them what the hell that is supposed to be, didn't receive a reply yet
[15:56] <radiumsoup> lol
[15:56] <yesminister> haha
[15:56] <[7]> I'm also a bit puzzled by that pink "dirt" at the top
[15:56] <Kushedout> Serious, soon as I go for lunch we get a special guest..
[15:56] <[7]> camera damage?
[15:56] <dexX7> it's on both pictures at exactly the same position
[15:57] <dexX7> i guess it's just dirt on the lense
[15:57] <radiumsoup> someone said dust on the sensor
[15:57] <dexX7> or that
[15:57] <[7]> sensor could be, lens can't
[15:57] <[7]> that wouldn't be focused
[15:57] <dexX7> true
[15:57] <dexX7> "I've already asked them what the hell that is supposed to be" < are you refering to the boards?
[15:58] <[7]> yes
[15:58] <dexX7> why?
[15:58] <[7]> that board design doesn't make much sense to me either
[15:58] <cowwater> thats comforting lol
[15:58] <[7]> does somewhere know where that picture originated from?
[15:58] <[7]> did some labcoin employee post it?
[15:58] <yesminister> yeah
[15:59] <dexX7> yes
[15:59] <Smily__> The only thing I can think the board would be used for is a mechanical sample or to test thermals
[15:59] <[7]> I'm wonderin what those traces to these cap-like-looking things are good for
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[15:59] <yesminister> does it look like it wouldnt work or that it's just a bad design?
[15:59] <Kushedout> Maybe you can ask them?
[15:59] <[7]> the connector pins basically go to one of these each, with one more pin for ground, or something like that
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