Hacking The KNC Firmware: Overclocking

[tolip_wen]

My master plan has been thwarted once again

An AVR Dragon JTAG programmer can program Altera parts.
Programming a part is less complicated than debugging a running part in circuit.

It is _NOT_ recognised by the Altera software that I was going to use to try and snoop.

I threw $17.00 to the wind,
I ordered a clone of the Altera cable.
In ~20 days I'll know if that was wise or not.

The real deal 'cable' is $300 USD. What I want to try may need the real deal.

The whole snooping the FPGA is highly dependent on if they set it up that way.
I gambled $17 that early FW has access for KnC debugging.


Other clock related data.
The oscillator on the ASIC PCB that(I think) the ASIC uses as input reference for it's PLL is 25MHz.
The 28nm has 4 oscillators @ 25 or 250MHz.
I cross-referenced to 250 back when, but now have doubts seeing the 25MHz part on the 20nm PCB.

For the very bold, can try a slightly different osc.
Ideally a freq synthesizer instead of osc. to explore.
One might expect terrible results down that rabbit hole.
If it is the input clock for the ASIC, it's part of a tuned system on the ASIC.

Additionally,
I think the r/c components for the on die PLL are on the bottom of ASIC PCB.
If you examine bottom of PCB closely can see 2 very tiny parts(per die) that do not fit pattern of filter caps.
Again someone very bold can try the 'pencil trick' on the PLL resistors, if that is what they are.
Will need a microscope, VERY SHARP PENCIL, and very steady hand.
(assumes can tell which is cap and which is resistor)

The 'pencil trick' is just using graphite from a pencil to lower resistance on a SMD resistor.
You literally draw across top of resistor with pencil.
Lowering resistance of an r/c circuit speeds it up at a cost of more current.
Slight changes can be too much, it depends on design.
DIfferent hardness pencil can have different result.
It is often easily reversable with spit and finger.

Stalled clocks can be a bad thing!
I DO NOT ADVOCATE changing parts on the PCB!!!
Food for thought though.

YMMV


EDIT:
temporarily unthwarted, got a gizmo that kinda works on the Altera JTAG.
(but not with the Altera Quartus IDE yet)
Must forge some 'USB identification papers' for the thing I think.
Using openocd at the moment. (built in pun in the name!)
Also discovered that KnC made it trivial to do JTAG interfaces WITH the BBB.
('might only' require a cable from one end of PCB to other)

Thx KnCMiner!

The bar is kinda high for my skillset but I blunder on!
Prolly another instance of,
'tolip opens mouth, changes feet'

[user27]

EDIT:
temporarily unthwarted, got a gizmo that kinda works on the Altera JTAG.
(but not with the Altera Quartus IDE yet)
Must forge some 'USB identification papers' for the thing I think.
Using openocd at the moment. (built in pun in the name!)
Also discovered that KnC made it trivial to do JTAG interfaces WITH the BBB.
('might only' require a cable from one end of PCB to other)
Thx KnCMiner!
The bar is kinda high for my skillset but I blunder on!
Prolly another instance of,
'tolip opens mouth, changes feet'

That went a clear 8 feet over my head; how can I help?

[capa]

My master plan has been thwarted once again

An AVR Dragon JTAG programmer can program Altera parts.
Programming a part is less complicated than debugging a running part in circuit.

It is _NOT_ recognised by the Altera software that I was going to use to try and snoop.

I threw $17.00 to the wind,
I ordered a clone of the Altera cable.
In ~20 days I'll know if that was wise or not.

The real deal 'cable' is $300 USD. What I want to try may need the real deal.

The whole snooping the FPGA is highly dependent on if they set it up that way.
I gambled $17 that early FW has access for KnC debugging.


Other clock related data.
The oscillator on the ASIC PCB that(I think) the ASIC uses as input reference for it's PLL is 25MHz.
The 28nm has 4 oscillators @ 25 or 250MHz.
I cross-referenced to 250 back when, but now have doubts seeing the 25MHz part on the 20nm PCB.

For the very bold, can try a slightly different osc.
Ideally a freq synthesizer instead of osc. to explore.
One might expect terrible results down that rabbit hole.
If it is the input clock for the ASIC, it's part of a tuned system on the ASIC.

Additionally,
I think the r/c components for the on die PLL are on the bottom of ASIC PCB.
If you examine bottom of PCB closely can see 2 very tiny parts(per die) that do not fit pattern of filter caps.
Again someone very bold can try the 'pencil trick' on the PLL resistors, if that is what they are.
Will need a microscope, VERY SHARP PENCIL, and very steady hand.
(assumes can tell which is cap and which is resistor)

The 'pencil trick' is just using graphite from a pencil to lower resistance on a SMD resistor.
You literally draw across top of resistor with pencil.
Lowering resistance of an r/c circuit speeds it up at a cost of more current.
Slight changes can be too much, it depends on design.
DIfferent hardness pencil can have different result.
It is often easily reversable with spit and finger.

Stalled clocks can be a bad thing!
I DO NOT ADVOCATE changing parts on the PCB!!!
Food for thought though.

YMMV


EDIT:
temporarily unthwarted, got a gizmo that kinda works on the Altera JTAG.
(but not with the Altera Quartus IDE yet)
Must forge some 'USB identification papers' for the thing I think.
Using openocd at the moment. (built in pun in the name!)
Also discovered that KnC made it trivial to do JTAG interfaces WITH the BBB.
('might only' require a cable from one end of PCB to other)

Thx KnCMiner!

The bar is kinda high for my skillset but I blunder on!
Prolly another instance of,
'tolip opens mouth, changes feet'

Keep up the good work Tolip

[tolip_wen]

That went a clear 8 feet over my head; how can I help?

That might be a good thing, I'm playing with sharpened blunt objects.

I know you didn't ask but a twisted overview follows:

A JTAG port is a way of programming Field Programmable parts, testing same, and testing PCB designs.
The Altera Cyclone 4 FPGA on the KnC controller has one of theese.
There is an unpopulated place for the JTAG connector on the power input end of the PCB.

I'm poking around with that using a USB JTAG dongle thingy.
The BBB can also do what the dongle thingy does with a bit of code.
So far I have not looked at a Neptune controller FPGA with JTAG toy.
I have 2 Saturn that will become 1 Hoopiter.
This will leave me with a spare controller.

After I make backups of the Saturn filesystem I'll reflash it and have a spare Neptune controller.
Then I can experiment a bit more freely with lower downtime and slightly less risk.

So far every turn has required hours of research/reading to 'almost' get up to speed with the part, the tool and 'openocd' software.
I had hoped to use the precompiled software the part manufacturer supplies but it is picky about using THEIR $300 tool.
I'll have a $10 clone of that in a week or two.
For now I have a 'flexible' alternative that is not plug and play.
I'm in that rabbit hole still learning.

If this approach fails we can snoop the communications between controller and ASIC.
I figure if the FPGA can filter a request, another micro or FPGA could unfilter it.
We may need to do this anyways(snoop) to identify what in the FPGA needs changed.

I'd also guess there is some way to send a frequency command that is unfiltered.
This would resemble the early 28nm way of OC if it exists.

There is another approach someone can try.
Send a Very Very Very POLITE note to KnCMiner and ask if they would please bump up the speed a notch or two.

Plant a seed!

YMMV

[user27]

I know you didn't ask but a twisted overview follows:

It's all useful info.

A JTAG port is a way of programming Field Programmable parts, testing same, and testing PCB designs.
The Altera Cyclone 4 FPGA on the KnC controller has one of theese.
There is an unpopulated place for the JTAG connector on the power input end of the PCB.

Is this the kind of thing you're talking about? I had to get this to mess with the old BTC Garden blades. What is required to connect to the Altera Cyclone 4?



This? It only has up to CycloneIII listed but I can't see much else available:
http://www.ebay.co.uk/itm/USB-BLASTER-CPLD-FPGA-JTAG-Programmer-10-Pin-JTAG-Connection-Cable-USB-Cable-/220886020325?pt=UK_BOI_Electrical_Test_Measurement_Equipment_ET&hash=item336dd530e5

[tolip_wen]

Is this the kind of thing you're talking about? I had to get this to mess with the old BTC Garden blades. What is required to connect to the Altera Cyclone 4?



This? It only has up to CycloneIII listed but I can't see much else available:
http://www.ebay.co.uk/itm/USB-BLASTER-CPLD-FPGA-JTAG-Programmer-10-Pin-JTAG-Connection-Cable-USB-Cable-/220886020325?pt=UK_BOI_Electrical_Test_Measurement_Equipment_ET&hash=item336dd530e5

That looks to be a clone of the $300 part.

EDIT
the ebay link is the 'clone'
What you have pictured is more than a clone.
Yours can support newer 20pin JTAG connection standard for SoC devices.
The BBB has a place for the 20pin flavor of JTAG BTW.
It may have an adaptor for 10pin JTAG or just the first 1/2 of the 20 pin connector.
Some can put whatever you want on specific pins thru programming.
The 'standard' says what is needed not where it must be on a connector.
All the correct signals and more are on the 20pin versions.


If it has the correct values in the USB eeprom, Altera Quartus II software will play happily with it.

To use that on FPGA on Nep you need to solder on a 2x5 connector or wires to PCB.
I do not advocate others solder on their PCBs.
You risk possibly killing a Neptune.

I/we do not know if it will produce useful data.
It is merely one avenue  to look.
It could easily be a wild goose chase.

If you already had a program you wanted to load into the FPGA that is one possible tool for the job.
To snoop and see what that program does, depends on if they allow for that in the design.

I stated before it's a $17 fun gamble for me.
I LIKE to spend hours learning new toys and SW.
For others it could be very UNFUN and more expensive gamble.

YMMV

[user27]

The BBB has a place for the 20pin flavor of JTAG BTW.

Well if I had a spare BBB I would give it a whirl. Would the 20 pin one be of any use to you in this en-devour?

[jelin1984]

how i can undervolt
my jupiter with padrino frimware?

[tolip_wen]

If anyone is interested,
I posted cgminer build instructions in the cgminer thread.
https://bitcointalk.org/index.php?topic=28402.msg7977952#msg7977952

No benefit right now to build yourself.
Only possible benifit is not waiting if KnCMiner updates code before a new FW release.
Unless you want to modify things

As usual

Your
Mileage
May
Vary

[Elenelen]

If anyone is interested,
I posted cgminer build instructions in the cgminer thread.
https://bitcointalk.org/index.php?topic=28402.msg7977952#msg7977952

No benefit right now to build yourself.
Only possible benifit is not waiting if KnCMiner updates code before a new FW release.
Unless you want to modify things

As usual

Your
Mileage
May
Vary

Thank you!

[tolip_wen]

Another slightly updated list of handy Neptune commands.
They do not change anything on miner.

Code:

api-cgminer
api-cgminer | grep MHS
api-cgminer | grep av
# get rid of the long line at the top
api-cgminer | grep -v Reply | grep  av
# slightly different output adds cgminer elapsed time in seconds
api-cgminer devs
# some different info
api-cgminer estats
api-cgminer estats | grep -v Reply | grep coremap | sed  s/..................../\&\\n/ | sed s/..................../\&\\n/g
# view LM75(PCB) temp and VRM info
waas -g all-asic-info
# just specific details
waas -g all-asic-info | grep I
waas -g all-asic-info | grep T
waas -g all-asic-info | grep V
waas -g all-asic-info | grep F
waas -g all-asic-info | grep tem
# Add ASIC# to specific details
waas -g all-asic-info | grep -e I -e asic
waas -g all-asic-info | grep -e T -e asic
waas -g all-asic-info | grep -e F -e asic
# if you noticed the 'estats' above did not finish last 4 die
# you can kinda hunt for sleepers on 5th ASIC (crude method)
# very subjective 
asic info 5 0
asic info 5 1
asic info 5 2
asic info 5 3
# just the core displayed 18 rows of 20 core
asic info 5 0 | grep Want | sed  s/"Want work: "// | sed s/..................../\&\\n/g
# It's that or 9 rows of 40 IMneverHO
# add 20 more dots to the line of dots above for 9x40
asic info 5 0 | grep Want | sed  s/"Want work: "// | sed s/......................................../\&\\n/g
# with the above 'asic' commands run it, wait a few seconds, hit the up arrow and enter to run it again
# You can see the asterisks march along for working core
# if you have some that never move they might be sleepers
# I think if it is repeated too often it might slightly impact thruput to that die till cgminer catches up 

I keep a file on miner for reference and  cut/paste commands.
Re-running a command is just a matter of finding it with the up arrow.
The sed stuff is crude and sub-optimal but 'almost' not cryptic.
Linear method applied, shortcuts exist but complexity can rise fast when you mix and match.

Different Tangent...
I got the Altera JTAG clone thingy today.
It's time for me to put up or shut up re: JTAG
Smaller Freq steps in useful range will totally depend on max "Fvco" on the ASIC.
http://www.altera.com/support/devices/pll_clock/basics/pll-basics.html
We know the input is 25MHz so it is a matter of how many bits adjustment available for "M".

EDIT. deleted incorrect confusing statement regarding step size.

I also have my alternate 'flexible' JTAG thingy ironed out.
I may use that to sniff the ribbon cable traffic instead of storage scope if it is fast enough.
Time to gut the Hoopiter and scavenge a controller. (sniffle)
I spent the interim searching for ways to reduce power consumption and reduce HW%.
Nuthin concrete but still have unexplored ideas up me sleeve.

So far cooling the VRM is the best result worth noting.
Volt adjustment can add just a tad too.


YMMV


P.S.
Way way way off topic but possibly humorous to some.
Life decided I needed a break from my routine.
My cat came home in middle of night with a face full of skunk spray.
Direct hit to the mouth and eyes.
I managed to irrigate her eyes/face for a few minutes without a single scratch or bite.
When bathed with just eye safe flea shampoo the stink only lasted a day.
Makes me wonder if it was a cheapo alternative used by a human.
I have handled refined mercaptin and a small drop lasts for weeks.
(In a laboratory setting, I would never inflict it on any living thing)
Either way I hope my cat paid attention in class because a lesson was paid for and delivered.
Not sure what my lesson was but I know there is one because I paid a small price too.
It probably has to do with radiator placement by screen door.
Does my Neptune attract critters?
Just an hour ago I discovered a neighbor cat wanting in.
Yee Haa! Life has surprises enough for everyone!
I wonder what the "skunk's" version of the story is.

[RoadStress]

All cores are ON and Jupiter is hashing at 681Gh/s. What does Fault 4 mean?

Code:

7 	OFF 	FAULT 4 	11.7 V 	0.826 V 	23 A (19 W)

[crashoveride54902]

All cores are ON and Jupiter is hashing at 681Gh/s. What does Fault 4 mean?

Code:

7 	OFF 	FAULT 4 	11.7 V 	0.826 V 	23 A (19 W)

i have no idea...i get that too on one of my oct. jups...also get a fault 1 code too...dunno if its overtemp considering i have 2 high cfm fans slapped together blowing on that module and its raised with heatsinks on top n bottom...oh well if it hashes i'm happy

[padrino]

All cores are ON and Jupiter is hashing at 681Gh/s. What does Fault 4 mean?

Code:

7 	OFF 	FAULT 4 	11.7 V 	0.826 V 	23 A (19 W)

i have no idea...i get that too on one of my oct. jups...also get a fault 1 code too...dunno if its overtemp considering i have 2 high cfm fans slapped together blowing on that module and its raised with heatsinks on top n bottom...oh well if it hashes i'm happy

That means the VRM is within 10C of thermal shutdown.. They will run like that but the temps are getting fairly close to the point where the VRMs turn themselves off..

[crashoveride54902]

All cores are ON and Jupiter is hashing at 681Gh/s. What does Fault 4 mean?

Code:

7 	OFF 	FAULT 4 	11.7 V 	0.826 V 	23 A (19 W)

i have no idea...i get that too on one of my oct. jups...also get a fault 1 code too...dunno if its overtemp considering i have 2 high cfm fans slapped together blowing on that module and its raised with heatsinks on top n bottom...oh well if it hashes i'm happy

That means the VRM is within 10C of thermal shutdown.. They will run like that but the temps are getting fairly close to the point where the VRMs turn themselves off..

then what does fault 1 mean?

[crashoveride54902]

boy did this thread die kinda just like knc IRC chat did as well...anyone still oc'in their jups? I am still making a profit with them...so nobody knows what fault 1 is?

[daddyfatsax]

boy did this thread die kinda just like knc IRC chat did as well...anyone still oc'in their jups? I am still making a profit with them...so nobody knows what fault 1 is?

I honestly cannot remember what it meant. I usually get a fault 4. I think it may have something to do with not enough power.

[crashoveride54902]

boy did this thread die kinda just like knc IRC chat did as well...anyone still oc'in their jups? I am still making a profit with them...so nobody knows what fault 1 is?

I honestly cannot remember what it meant. I usually get a fault 4. I think it may have something to do with not enough power.

thanks..module still performs alright so no biggy i guess

[Searing]

someone please figure out how to over clock the
Titan ...I am so f*cked...check out knc forum and tech page
they are shipping this beast out the door w/o any real stable firmware
not y cables etc

what a joke

the sprint to arctic cloud continues

thanks ..prob not possible it would blow up but if anyone is attempting such please post

on a side note I have a y connector from cablez I got in case (2 OF THEM)

can't get a clear answer it this will work on Titan ...frack we can't even get a clear

answer on power supplies (the say 2 850w recommended for 1100w unit wtf)

but w/o connector info stuck

again thanks ..if you can't help at least you are aware that they have gone to
frankenjupiter...to Neptune..to titan all with little chance of ROI ...

disgusted with them ..and their run to virtual mining sticking us with crap

[Tupsu]

Can i downclock KNC november Jupiter ?

what would be the best settings  1GH/s=1W or less