1GH/s, 20w, $500 — Butterflylabs, is it a scam?

[fred0]

I know that this is hard to imagine.

Maybe, the BFL people are NOT scammers.

Maybe, consider the possibility, they simply implemented a technological manufacturing/fabrication technique, namely, structured asic, before the competition did the same.

I am waiting to see results of testing.

[edit] technological technique -- odd phrasing

[Inaba]

Will you be able to see the chips under the heat sinks on the units you test? Is there a way to confirm what chips they are?

No, I won't have the opportunity to remove the heat sinks to look at or take pictures of the chips underneath.  I guess the shipping units will have to be used for that.  While I agree this is kind of a silly stipulation (Because that will be done with the first one off the line), I believe it stems from caution and not intent to conceal for any deceptive reasons.

That said, yes I will get better pictures of the visible chips once I can get it in better lighting and I get can a proper tripod setup for macro shots.

[sadpandatech]

I can't see how they had this custom made.

Its not rocketscience.  
BTW, I suspect BFL didnt take this easy approach, I suspect they made their own FPGA design to allow flexibility for other applications besides bitcoin mining, but you could do it like that.

Next time you may want to read up before offering $100.000 bets.

BTW, found some info on timings for Hardcopy:
http://www.altera.com/devices/asic/hardcopy-asics/about/hrd-development-methodology.html

From FPGA to working silicon in 7 weeks. No bad.

  Aye, I agree on the 'not taking the easy approach'  If you look at the current product info on their site for the Bitforce one, there is a 'note' there directed towards customers who will be using this for packet verification, " Note:  Members of our packet verification product program will receive a different firmware package".  That's what I was trying to point towards when I linked the NIST stuff a few pages back. Boeing(which I can't link to) and a slew of other companies have been piling their devices onto the SHS list this year in massive numbers.  It was correctly pointed out that message digesting or 'one way' hashing of docs, etc does not require much processing power. But, doing it at the packet/fragment level for identing the source does. Boeing at the very least, and I would assume more have been working on securing communications at the packet lvl using sha-2 since I was last with them. About 7 years ago...

  Which brings me back to my question for them and to expand on it. "Are you guys gov contractors?" "Is your device or other device you have access to on the SHS list?"


  Still anxious to see if this thing actualy hashes as advertised.

[sadpandatech]

Will you be able to see the chips under the heat sinks on the units you test? Is there a way to confirm what chips they are?

No, I won't have the opportunity to remove the heat sinks to look at or take pictures of the chips underneath.  I guess the shipping units will have to be used for that.  While I agree this is kind of a silly stipulation (Because that will be done with the first one off the line), I believe it stems from caution and not intent to conceal for any deceptive reasons.

That said, yes I will get better pictures of the visible chips once I can get it in better lighting and I get can a proper tripod setup for macro shots.

  I'd love to see them as well, though they more than likely are blank or just have batch numbers and dates on them if they are custom hardcopies..

[P4man]

Inaba can you just ask them whats underneath the heatsink? FPGA, Structured asic or asic?
They may or may not answer it, but it doesnt hurt asking.

[P4man]

 Which brings me back to my question for them and to expand on it. "Are you guys gov contractors?" "Is your device or other device you have access to on the SHS list?"

Not sure what the SHS list is.. but this is on their website:

5. Do your products fall under US encryption export control classification?

Yes, the BitForce SHA256 processor is properly classified under the US Bureau of Industry and Security export control.  Our export control restriction prohibits the export of our products to AT designated countries as specified by the US Department of Commerce.  If you need clarification on your ability to purchase our products, please contact us for review

Is that what you meant?

[sadpandatech]

 Which brings me back to my question for them and to expand on it. "Are you guys gov contractors?" "Is your device or other device you have access to on the SHS list?"

Not sure what the SHS list is.. but this is on their website:

5. Do your products fall under US encryption export control classification?

Yes, the BitForce SHA256 processor is properly classified under the US Bureau of Industry and Security export control.  Our export control restriction prohibits the export of our products to AT designated countries as specified by the US Department of Commerce.  If you need clarification on your ability to purchase our products, please contact us for review

Is that what you meant?

  Different lists. This is the EAR list which most all, ready to use electronics fall under. http://www.bis.doc.gov/licensing/exportingbasics.htm That makes me wonder if thats the number they etched off the board...??

  But, in order to even submit for SHS they would need to have all of the DOJ stuff in order..  In itself it really doesn't mean much more than they are not new to selling electronics that may be available internationaly.

  Edit; CMVP list here(I cannot link directly to the current SHS list);http://csrc.nist.gov/groups/STM/cmvp/documents/140-1/1401val2011.htm
          Note, this is a list of ALL items subimited for validation and are a mix of software, hardware and different techs. Obviously only a very small fraction are suitable or directly designed for Sha-2 exclusively

[Inaba]

Inaba can you just ask them whats underneath the heatsink? FPGA, Structured asic or asic?
They may or may not answer it, but it doesnt hurt asking.

I already did  They declined to answer.  Like I said, it seems a little silly since that knowledge will become public, assuming they hit their target ship dates (and I have no reason to believe they won't at this point), shortly after the first unit ships.  But I think it's a fair restriction given product and their willingness to be open about everything else.

[sadpandatech]

Inaba can you just ask them whats underneath the heatsink? FPGA, Structured asic or asic?
They may or may not answer it, but it doesnt hurt asking.

I already did  They declined to answer.  Like I said, it seems a little silly since that knowledge will become public, assuming they hit their target ship dates (and I have no reason to believe they won't at this point), shortly after the first unit ships.  But I think it's a fair restriction given product and their willingness to be open about everything else.

  hehe, I wonder how long it will take a few of the guys floating around here to emulate the bitstream off of one of these.  Of course even if someone did it will not make getting their own hardcopy any cheaper. But will be a neat project, none the less.

[sadpandatech]

  So, Inaba, when are you going to be getting a unit for testing?  How come they did not leave you with one last night?  *paces*

[runeks]

Thanks a lot for the pictures Inaba! It's very nice to see some progress on this.
I glad to see it working in Linux. I plan on using Linux as well, hopefully I can get the driver to compile on ARM so I can get a ~25 W mining system.

What was the sound level from the fan like? I live in a one room apartment, so I hope the noise level isn't too disturbing.

@P4man: regarding the chips on the board. One of them is an Atmel AT32UC3A1128 micro-controller.

[Turbor]

I think they met in a restaurant  . No wonder they were unable to test it.

[P4man]

  hehe, I wonder how long it will take a few of the guys floating around here to emulate the bitstream off of one of these.  Of course even if someone did it will not make getting their own hardcopy any cheaper. But will be a neat project, none the less.

I doubt you can do that; but even if you could, if your goal is only bitcoin mining, you would probably be better served by taking open fpgaminer and 'hardcopying' that. Whatever BFL did to make their product more flexible is almost certainly at the expense of speed and power efficiency.

Honestly, if I had serious doubts about BFL's claims, Id be talking to some people right now to make a "hardcopy" for bitcoin mining.  (Oh, and then Id set up a rubbish website and accept preorders and bait goat in to a bet to finance half my production costs!)

If the numbers I hear left and right are only ball park accurate, its really a no-brainer and Im surprised some of the FPGA savvy people here are not investigating this course, or at least not talking about it. Unless you are wealthy, it will require VC funding, but that shouldnt be very hard as this is a really low risk venture.

[DeathAndTaxes]

I doubt you can do that; but even if you could, if your goal is only bitcoin mining, you would probably be better served by taking open fpgaminer and 'hardcopying' that. Whatever BFL did to make their product more flexible is almost certainly at the expense of speed and power efficiency.

You are right on not being able to extract the bitstream because there is nothing to extract.  Unlike an FPGA which is field programmable (and thus you can steal the "program" an sASIC is mask programmable.  Unless someone breaks into Altera labs or uses some xray analysis to reverse engineer the design you aren't getting the "program".

But dumping open FPA onto a hadcopy would be horrible.  FPGA miner  has the worst performance of all the mining bitstreams out there.  Also it is optimized for 150K LUTs and Altera makes no hardcopy that small.  Just dumping it on a larger chip wouldn't get you very good performance per mm^2 of die space.  It would be very inefficient.  Maybe you brute force some decent performance by simply getting high enough clock but you end up leaving a lot of performance potential behind.

To do it right you need to buy some high end FPGA that matches the specs of the HardCopy you intend to use.  You may even want to buy multiple high end FPGA to try various designs.  Then you need some smart people like rph or ztek or outside telent.  Pay them to take their designs (already higher hashrates than the open FPGA project) and optimize it for the larger LUT count and more efficient routing of the higher end FPGA.  Spend a couple months getting the most efficient design possible.

Only once you have a high performance FPGA design which makes the characteristics of the Hardcopy you intend to use exactly do you burn it.  Contract w/ Altera and have a batch 0f 10K hardcopy sASICS burned with a mask derivted from your optimized FPGA bitstream.  Maybe make the design opensource and raise money via pre-orders to pay for the mask and initial run.

Unless you are wealthy, it will require VC funding, but that shouldnt be very hard as this is a really low risk venture.

What about it would be low risk?  Even if you consider it low risk convincing some VC types who have never heard of Bitcoin much less the market for mining hardware is quite a sell.  Of course there is always the risk someone else releases an even more optimized design (possibly on a larger run) and the value of your unsold chips plummet.

[bulanula]

SO then should we understand or assume that this is what BFL did and they use 2 Hardcopy chips from Altera or did they do something else ?

I though we were getting custom BTC ASICs like in a couple of years not right now. Maybe Altera is not a real ASIC and just one that is generic but was customised for mining ?

[DeathAndTaxes]

SO then should we understand or assume that this is what BFL did and they use 2 Hardcopy chips from Altera or did they do something else ?

I though we were getting custom BTC ASICs like in a couple of years not right now. Maybe Altera is not a real ASIC and just one that is generic but was customised for mining ?

Assuming this is real we won't know for sure until someone buys one and removes the heatsinks.

Still the theory isn't that these aren't custom ASICS but instead are structured ASICS (sASICS).  

A structured ASIC is partially "pre-built" with a large number of LUTs.  Very similar to an FPGA.  However in a FPGA all the routing of every possible combnation between LUTs are part of the chip.  This adds a lot of overhead.  In a sASIC there is no routing in the chip.  It is "incomplete".  

The only part that is customized in a sASIC is the routing.  A mask is built for the routing traces and a routing layer etched.  This layer is then sandwhiched w/ the "pre-built" logic layers.  Essentially is a step between a custom ASIC and an FPGA.  Since only one layer is customized it has a cheaper upfront cost than a custom ASIC (hundreds of thousands vs millions of dollars) and since it has no pre-built routing (for every possible combinatio between LUTs) it has a lower per-unit cost than an FPGA, and higher performance.

So
Custom ASIC - highest upfront cost, lowest cost per chip, higher performance per chip.
Structured ASIC - medium upfront cost, medium cost per chip, medium performance per chip.
FPGA - no/low upfront cost, highest cost per chip, lowest performance per chip.

[rjk]

For future reference, what is the best method to use for removing heatsinks that have been attached with thermal glue (instead of using thermal grease and holding them on with screws)?

[P4man]

Well open FPGA miner  has the worst performance of all the bitstreams.  Also it is optimized for 150K LUTs.  Just dumping it on a larger chip wouldn't get you very good performance per mm of die space.  It would be very inefficient. 

I have no idea about the FGPA miner apps out there, but Ill take your word for it. That said, it might actually be a good idea to make much smaller chips than X6500s and the like. Particularly if you can cram 8 or more on a board.

What about it would be low risk? 

The fact that you are guaranteed to get a working chip and in relatively short time and with very little possible surprises when it comes to bugs, performance, power consumption, yields etc. All of that is very much unlike full custom designs. As for convincing VCs; they may not even care what a bitcoin is, all you need to convince them off is that there is a sizable market for energy efficient SHA2 hashing and you have a product that will outperform the established competition by triple digit numbers.

Of course there is always the risk someone else releases an even more optimized design (possibly on a larger run) and the value of your unsold chips plummet.

True that. Still, turnaround times Altera promises make this an extremely manageable risk compared to most semicon projects.  I also think the market is big enough for 2 or more players. IMO the real victims of a fierce competition here will be miners getting stuck with one generation after another of devices that are no longer profitable.

[P4man]

For future reference, what is the best method to use for removing heatsinks that have been attached with thermal glue (instead of using thermal grease and holding them on with screws)?

Put them in the freezer for a few hours (in a sealed bag). They will come right off.

[DeathAndTaxes]

For future reference, what is the best method to use for removing heatsinks that have been attached with thermal glue (instead of using thermal grease and holding them on with screws)?

Remove the screws (obviously).  Then twist 90 degrees.  That should break enough of the adhesion to allow you to remove the heatsink. If the heatsink isn't significantly loser you likely will need to try again.  I have done it plenty of times on things like northbridge heatsinks but kinda scary doing it on a $500 board.

NEVER pull hard straight upward.  Until you break the adhesion you have a good chance of ripping the solder joints right from the board.