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Author Topic: ASICMINER: Entering the Future of ASIC Mining by Inventing It  (Read 3901148 times)
jimmothy
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April 27, 2014, 08:51:37 AM
 #18841

Not the exact die sizes but they are both in an 8mmx8mm package

Which is nearly as useful a metric as saying they both ship in 2U rackmounts...

Not exactly since package size is relative to die size but I get your point.

But notice how mr sp tech never denied their 40nm wafer costs being more expensive? He simply said that overclocking can compensate and that their 28nm will be more cost effective than AM 40nm.
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April 27, 2014, 08:56:52 AM
 #18842

Quote
Hammers (our 1st gen) can achieve 10 GHs easily. Tested. May achieve more, not tested.

But at 10gh is it still 0.55w/gh at the chip level?

Quote
You got it completely wrong. Our 2nd gen (RockerBox) is much, much better in term of $/GHs then any 40nm ASIC out there.

It very well could be but until you have the chips in hand and tested you wont know. And how much is "much much better"?  If it is a simple die shrink that would only be a 30% improvement.

It will be my last post here for a while.

Gen1 ("Hammer") is indeed 0.55W/GHs, which is comparable with AM gen3 results I read here: http://blog.rockminer.com/#!/2014/04/13/Testing_Results_Of_BE200.md
("Power consumption per Ghash:6.375/11.52=0.5539W/Ghash")

You're confusing the "rule of thumb" 30% improvement in power or frequency (40nm -> 28nm) with 2X improvement in area size (cost).
By moving to a larger package (FCBGA 19mmx19mm, the data in our web site is outdated), we've actually reduced price by over 3X

This is gen2 ("RockerBox") brief: https://www.dropbox.com/s/c65ebuvoh5sek2f/rockerbox_brief.pdf

The SP30 (our 2nd gen system) is designed to take advantage of our 2nd gen ASIC (RockerBox) optimal working point (the ASIC brief is attached):

Voltage                                     0.63 V
Total Engines                            193
Max frequency at TT corner         984 MHz
Performance                              90 GHs
Power                                       65 W
Power/performance                    0.34 W/GHs
 
We're using 2 PSUs, each of them is 1.2 KW rated, but can pull up to 1.35 KW

Total system output is expected to be over 6 TH/s:

AC2DC derating: 93%
DC3DC derating: 85%
Fans: 60W

(2700 - 60) * 0.93 * 0.85 / 0.34 ~= 6.1 THs

We're advertising 5.4 THs +- 10%

The gen2 is done deal. We're taping out in 2 weeks, and will deliver working systems in July.

We're now working hard on our gen3. Much more interesting spec ...



New Mimblewimble implementation: https://www.beam.mw
Spondoolies is back with the SPx36: https://www.spondoolies-tech.com/products/spx36
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April 27, 2014, 09:10:10 AM
 #18843


Not exactly since package size is relative to die size but I get your point.

No its not. Primary consideration for package type is its cost, pin count and power delivery. Of course you cant put a bigger die in a package than the package size, but 8x8mm packages are by far the most common and used billions of times (literally) for dies as small as 1-10mm². How big are the dies we are talking about here? Lets have a ballpark guess; HF is getting almost 2GH/mm² on 28nm. If we assume spoonsomething/AM get half that on their older process, then you are looking at ~10mm² dies. It may be 2 or 3x more or less, who knows, but that the package is 64mm² says close to nothing.

But notice how mr sp tech never denied their 40nm wafer costs being more expensive?
[/quote]

How could he? He doesnt have AM die size or wafer/packaging costs. Not that it matters to them, silicon production cost is only a tiny tiny fraction of overall miner cost/price for all vendors. 
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April 27, 2014, 09:19:33 AM
 #18844

Quote
Hammers (our 1st gen) can achieve 10 GHs easily. Tested. May achieve more, not tested.

But at 10gh is it still 0.55w/gh at the chip level?

Quote
You got it completely wrong. Our 2nd gen (RockerBox) is much, much better in term of $/GHs then any 40nm ASIC out there.

It very well could be but until you have the chips in hand and tested you wont know. And how much is "much much better"?  If it is a simple die shrink that would only be a 30% improvement.

It will be my last post here for a while.

Gen1 ("Hammer") is indeed 0.55W/GHs, which is comparable with AM gen3 results I read here: http://blog.rockminer.com/#!/2014/04/13/Testing_Results_Of_BE200.md
("Power consumption per Ghash:6.375/11.52=0.5539W/Ghash")

You're confusing the "rule of thumb" 30% improvement in power or frequency (40nm -> 28nm) with 2X improvement in area size (cost).
By moving to a larger package (FCBGA 19mmx19mm, the data in our web site is outdated), we've actually reduced price by over 3X

This is gen2 ("RockerBox") brief: https://www.dropbox.com/s/c65ebuvoh5sek2f/rockerbox_brief.pdf

The SP30 (our 2nd gen system) is designed to take advantage of our 2nd gen ASIC (RockerBox) optimal working point (the ASIC brief is attached):

Voltage                                     0.63 V
Total Engines                            193
Max frequency at TT corner         984 MHz
Performance                              90 GHs
Power                                       65 W
Power/performance                    0.34 W/GHs
 
We're using 2 PSUs, each of them is 1.2 KW rated, but can pull up to 1.35 KW

Total system output is expected to be over 6 TH/s:

AC2DC derating: 93%
DC3DC derating: 85%
Fans: 60W

(2700 - 60) * 0.93 * 0.85 / 0.34 ~= 6.1 THs

We're advertising 5.4 THs +- 10%

The gen2 is done deal. We're taping out in 2 weeks, and will deliver working systems in July.

We're now working hard on our gen3. Much more interesting spec ...




oh look! someone who didn't just pull numbers out their arse.
Thank you for clarifying what we already knew.

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April 27, 2014, 09:31:21 AM
 #18845

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How could he? He doesnt have AM die size or wafer/packaging costs. Not that it matters to them, silicon production cost is only a tiny tiny fraction of overall miner cost/price for all vendors.  

AM wafer cost was stated to be $0.2/gh but you're right it is somewhat irrelevant without knowing all the production costs for both sides.

Quote
You're confusing the "rule of thumb" 30% improvement in power or frequency (40nm -> 28nm) with 2X improvement in area size (cost).
By moving to a larger package (FCBGA 19mmx19mm, the data in our web site is outdated), we've actually reduced price by over 3X

The gen2 is done deal. We're taping out in 2 weeks, and will deliver working systems in July.

Also right. I retract my statement about AM gen3 being able to reasonably compete with SP 28nm assuming the reduced price by 3x is accurate. Even a pessimistic estimation with SP 40nm costing $0.4/gh at the wafer level, a 3x reduction would mean $0.12/gh for their 28nm chips.

IF SP can get their next gen out the door without a hitch, AM might be in for another cold winter..
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April 27, 2014, 09:45:07 AM
 #18846


Those preorders are ridiculously priced I don't understand when and where people are going to make a ROI at those rates..

And fc will come out with another generation of mining chips that will put all its competitors to shame as he has done so in the past. Haters will hate

This is quoted for future laughs, but i also feel the need to reply to this. Call it advertising or not i don't care. I MUST reply!

"Ridiculously priced"? At 0.83$/GH i don't understand how can this be nothing else than ridiculously good! You also stated that you don't understand how are people going to make ROI, but when comparing to AM 0.55-0.99$/GH just for chips i just don't get your logic behind your statement. Statement backed by nothing. AM's chips never put their competition to shame Smiley

gen1-3 have each been a few months apart. What makes you think gen4 will take 2 years?

We don't know how AM gen4 will perform compared to SP gen2 because neither exist yet.

What we do know is that AM 40nm is the most efficient asic in existence as of now(by a tiny amount) and much more powerful than spondoolies 40nm (~40% more).

gen1-3 just a few months apart? please share me your timeline because from what i know it was a bit more than a few months.

Spondoolies 40nm is hashing since end of March, when AM's still isn't hashing in customers hands. What are we comparing here? Why do i have the feeling that when SP-Tech gen2 chips start hashing the customers will barely get AM gen3 miners in hands?


As i said these are my views and i will still have them after GB will end.

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April 27, 2014, 09:45:47 AM
 #18847

IF SP can get their next gen out the door without a hitch, AM might be in for another cold winter..

And now what makes you think spoonsomething's costs are anything special? For the record I estimated HF's golden nonce at ~$30 in non-packaged silicon production cost (324mm², $4000 per wafer, 80% yield). They seem to get ~800GH from that now (or soon, or sometime), thats less than $0.04/GH. And Im not using HF because I think their design is particularly good, its just the only one I have an official die size for atm.
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April 27, 2014, 10:12:33 AM
 #18848

Gent's this thread isn't about who has the biggest theoretical ASIC dick. If you need to fantasize about that may I suggest you do it somewhere else and not necessarily in public. The claims are useless in an industry where the realities are manufacturers are rarely on spec and more importantly on time. The moment you state your assumptions as facts you lose all credibility and no one listens to you anymore.
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April 27, 2014, 10:19:47 AM
 #18849

IF SP can get their next gen out the door without a hitch, AM might be in for another cold winter..

And now what makes you think spoonsomething's costs are anything special? For the record I estimated HF's golden nonce at ~$30 in non-packaged silicon production cost (324mm², $4000 per wafer, 80% yield). They seem to get ~800GH from that now (or soon, or sometime), thats less than $0.04/GH. And Im not using HF because I think their design is particularly good, its just the only one I have an official die size for atm.

$30/400gh is impressive. Surprising that HF is supposedly out of money even with 100 times markup. 750gh gets 0.8w/gh so its not really worth it or won't be for long.

spoonsomethings costs are special because ~0.35w/gh puts it in another class of asics. I don't think AM gen3 (or any current gen) will compete with it.
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April 27, 2014, 10:20:20 AM
 #18850

Gent's this thread isn't about who has the biggest theoretical ASIC dick. If you need to fantasize about that may I suggest you do it somewhere else and not necessarily in public. The claims are useless in an industry where the realities are manufacturers are rarely on spec and more importantly on time. The moment you state your assumptions as facts you lose all credibility and no one listens to you anymore.

Let's talk again in 3 months!

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April 27, 2014, 10:38:08 AM
 #18851

I have little doubt that the the supporting hardware can be made on time. Circuit board and software development is a well developed and disciplined field that has decades of experience. That's not a concern.

There was mention of quality. By it's disposable nature most mining hardware is junk just built able to function long enough and get to market quickly enough to be profitable. This isn't an industry where you are rewarded for quality unless it affects reliability for the short duration of the hardware's useful life. No marks added for quality beyond that point. Spondoolies may make the finest box to use for a paperweight three months from now.
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April 27, 2014, 10:39:39 AM
 #18852

I have little doubt that the the supporting hardware can be made on time. Circuit board and software development is a well developed and disciplined field that has decades of experience. That's not a concern.

There was mention of quality. By it's disposable nature most mining hardware is junk just built able to function long enough and get to market quickly enough to be profitable. This isn't an industry where you are rewarded for quality unless it affects reliability for the short duration of the hardware's useful life. No marks added for quality beyond that point. Spondoolies may make the finest box to use for a paperweight three months from now.

wrong, stability = quality.

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April 27, 2014, 10:42:06 AM
 #18853

Gent's this thread isn't about who has the biggest theoretical ASIC dick. If you need to fantasize about that may I suggest you do it somewhere else and not necessarily in public. The claims are useless in an industry where the realities are manufacturers are rarely on spec and more importantly on time. The moment you state your assumptions as facts you lose all credibility and no one listens to you anymore.

I have little doubt that the the supporting hardware can be made on time. Circuit board and software development is a well developed and disciplined field that has decades of experience. That's not a concern.

There was mention of quality. By it's disposable nature most mining hardware is junk just built able to function long enough and get to market quickly enough to be profitable. This isn't an industry where you are rewarded for quality unless it affects reliability for the short duration of the hardware's useful life. No marks added for quality beyond that point. Spondoolies may make the finest box to use for a paperweight three months from now.

So first time you are talking about a product (gen2 chips) and after my reply you switch to another product(gen1 chips)? Why not stay on topic?

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April 27, 2014, 10:51:28 AM
 #18854

@roadstress. I'm not sure where your making the assumption I'm strictly specifically addressing your comments to use as arguments.
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April 27, 2014, 02:22:52 PM
 #18855

$30/400gh is impressive. Surprising that HF is supposedly out of money even with 100 times markup. 750gh gets 0.8w/gh so its not really worth it or won't be for long.

spoonsomethings costs are special because ~0.35w/gh puts it in another class of asics. I don't think AM gen3 (or any current gen) will compete with it.


Nope, half the power consumption isnt another class. Thats well within range of what any particular chip can do depending on voltage. Im pretty sure most current 28nm vendors could hit those efficiencies if they wanted to, albeit it at the expense of performance per chip. All thats needed is lowering the voltage and reducing the clock. Let me illustrate with a typical schmoo plot, showing the relationship between clock and voltage of whatever chip:



For this chip, maximum frequency is 1GHz and getting there requires 2V. If this plot applied to a bitcoin asic, most bitcoin mining vendors would probably pick around 1.85V for 900-950Mhz, since performance/$ is still far more important than per watt. Evidence of that is that most mining chips are only marginally overclockable, even if you seriously increase voltage/cooling. It simply makes more sense to pick a point at the high end of the curve today.

Now if you were to downclock that very same chip to, say, 400 MHz, you need only ~1V. Please note the relationship between voltage and and power draw is quadratic. So the 400GHz clocked chip,  would be almost twice as power efficient as the one clocked at 900 MHz.

This is exactly what bitmain did, and when the need arises, so will Cointerra, HF, KnC, Bitmine, BFL, and all the other 28nm vendors. 0.35W/GH at the chip level is nothing special.

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April 27, 2014, 03:15:10 PM
 #18856

Quote
Im pretty sure most current 28nm vendors could hit those efficiencies if they wanted to

I'm pretty sure it's not that simple or they would all be advertising/doing it.

Quote
This is exactly what bitmain did, and when the need arises, so will Cointerra, HF, KnC, Bitmine, BFL, and all the other 28nm vendors. 0.35W/GH at the chip level is nothing special.

If knc could simply lower their voltage why would they spend 10 million on 20nm nre just to get 0.4w/gh at the chip level?

What makes you think the next gen of asics won't be similarly underclockable?
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April 27, 2014, 03:24:07 PM
 #18857

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Im pretty sure most current 28nm vendors could hit those efficiencies if they wanted to

I'm pretty sure it's not that simple or they would all be advertising/doing it.

Quote
This is exactly what bitmain did, and when the need arises, so will Cointerra, HF, KnC, Bitmine, BFL, and all the other 28nm vendors. 0.35W/GH at the chip level is nothing special.

If knc could simply lower their voltage why would they spend 10 million on 20nm nre just to get 0.4w/gh at the chip level?

What makes you think the next gen of asics won't be similarly underclockable?

every chip is underclockable. Bitmain can achieve anything from 1w/GH to 2.2w/GH depending on the frequency and voltage.  I am sure 0.8w/GH could be achieved if they wanted to go even lower

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April 27, 2014, 03:43:05 PM
 #18858

I'm pretty sure it's not that simple or they would all be advertising/doing it.

Your ignorance of laws of physics doesnt change them. Every one with some experience over/underclocking CPU's and GPU's would be well aware of the range and impact of  core voltages.

As for why they arent doing it yet; it doesnt make financial sense yet. Hardware prices are still far too high, electricity cost is still utterly marginal for most large customers. Pricing is done per GH, cutting that in half to get better power efficiency doesnt pay off now. Fast forward 6 months and you will see.

Quote
If knc could simply lower their voltage why would they spend 10 million on 20nm nre just to get 0.4w/gh at the chip level?

Because 20nm should also be cheaper to produce per GH, due to the increased transistor density. Not that I  (ever) expect(ed) a 20nm part before late fall, but thats another story.
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April 27, 2014, 04:39:51 PM
 #18859

Your ignorance of laws of physics doesnt change them. Every one with some experience over/underclocking CPU's and GPU's would be well aware of the range and impact of  core voltages.

As for why they arent doing it yet; it doesnt make financial sense yet. Hardware prices are still far too high, electricity cost is still utterly marginal for most large customers. Pricing is done per GH, cutting that in half to get better power efficiency doesnt pay off now. Fast forward 6 months and you will see.

What makes you so sure that current gen chips are underclockable to better than advertised efficiency? Like how bitmine advertised low power mode at 0.35w/gh (according to your understanding of physics it should have worked) yet underclocking did diddly squat.

You need some evidence before you can claim so confidently that all current gen chips are underclockable to below 0.4w/gh (at a reasonable $/gh)

Quote

Because 20nm should also be cheaper to produce per GH, due to the increased transistor density. Not that I  (ever) expect(ed) a 20nm part before late fall, but thats another story.

How exactly is spending 10 million rushing to the smallest node size cheaper? According to nvidia 20nm is less cost effective than 28nm.
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April 27, 2014, 05:04:51 PM
 #18860

According to nvidia...

 Roll Eyes

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