daemonic
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June 20, 2012, 09:09:18 PM Last edit: June 22, 2012, 12:46:47 AM by daemonic |
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I managed to get it to work first time by having SW1/SW6 all on for the programming, then for my cgminer to work, i had to switch SW6 1 off again. preliminary stats from cgminer API looks like 380MH/s from each PGA??. (1 / 2.632e-9 = 379.93) So to program, i had to have the same settings as atsoat; SW6 1 off, 234 on [ I actually had 1 on during programming, but not sure if this was necessary] SW1 all on
SW2 (PGA 0) all on SW3 (PGA 1) 12 off, 34 on SW4 (PGA 2) 12 off, 34 on SW5 (PGA 3) all on details from cginer API; [read_count] => 112 [fullnonce] => 11.320125 [count] => 2 [Hs] => 0.000000002632127 so icarus-timing option would be 2.632=112 from what i learnt from kano
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spiccioli
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June 20, 2012, 09:12:24 PM |
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You guys got it writing to the SPI flash too?
No, just reprogrammed FPGA0 and FPGA3 without making this permanent. spiccioli
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atsoat
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June 20, 2012, 09:14:53 PM |
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You guys got it writing to the SPI flash too?
I've done the first part successfully but when I'm trying to write to SPI flash I get "Unknown JDEC manufacturer: ff" "ISF bitfile probably not loaded"
Not sure if I need to change the DIP switches to the ones in twin_test.bit now? Do I do the first part then change my DIP switches to match the "twin_test.bit" PDF file ones whilst it's still turned on or something?
No. I get the same error as you when trying the SPI flash.
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norulezapply
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June 20, 2012, 09:19:45 PM |
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You guys got it writing to the SPI flash too?
No, just reprogrammed FPGA0 and FPGA3 without making this permanent. spiccioli Do you change the DIP settings back to "normal mode" after flashing?
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spiccioli
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June 20, 2012, 09:21:39 PM |
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I managed to get it to work first time by having SW1/SW6 all on for the programming, then for my cgminer to work, i had to switch SW1 1 off again.
preliminary stats from cgminer API looks like 260MH/s from each PGA.
Ok Mpbm shows a wrong speed as well, it's telling me that each FPGA is hashing at 378 MH/s, but my pool sees them both at around 280 MH/s spiccioli
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spiccioli
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nec sine labore
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June 20, 2012, 09:24:09 PM |
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You guys got it writing to the SPI flash too?
No, just reprogrammed FPGA0 and FPGA3 without making this permanent. spiccioli Do you change the DIP settings back to "normal mode" after flashing? Yes norulez, as per twin_test.pdf page 1. spiccioli
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daemonic
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June 20, 2012, 09:26:07 PM Last edit: June 22, 2012, 12:45:19 AM by daemonic |
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@norulezapply, to program, i had;
SW6 all on SW1 all on SW2 (PGA 0) all on SW3 (PGA 1) 12 off, 34 on SW4 (PGA 2) 12 off, 34 on SW5 (PGA 3) all on (as per progamming operation from virtual box, but ignoring the SW1 3 off)
then to use standard cgminer, i switched SW6 1 off;
SW6 1 off, 234 on SW1 all on SW2 (PGA 0) all on SW3 (PGA 1) 12 off, 34 on SW4 (PGA 2) 12 off, 34 on SW5 (PGA 3) all on (as per normal operation)
(this is for twin_test.bit)
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norulezapply
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June 20, 2012, 09:27:11 PM |
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Okay thank you! I didn't know whether or not it was safe to change the DIP switches whilst the device is still switched on
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daemonic
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June 20, 2012, 09:38:14 PM |
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you could probably use enterpoints cgminer build and not have to switch the SW1 #1 DIP as i believe that switches between 115,200 and 57,600 baud rates.
default cgminer uses 115,200, enterpoints build used 57,600
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norulezapply
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June 20, 2012, 10:09:48 PM |
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you could probably use enterpoints cgminer build and not have to switch the SW1 #1 DIP as i believe that switches between 115,200 and 57,600 baud rates.
default cgminer uses 115,200, enterpoints build used 57,600
I've got 3 out of 4 running on MPBM now so no need
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norulezapply
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June 20, 2012, 10:28:11 PM |
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you could probably use enterpoints cgminer build and not have to switch the SW1 #1 DIP as i believe that switches between 115,200 and 57,600 baud rates.
default cgminer uses 115,200, enterpoints build used 57,600
I've got 3 out of 4 running on MPBM now so no need Can you post your switch settings? Why isn't the 4th one working? I'm using the "Normal mode" settings from the twin_test PDF. I don't know why the 4th one isn't working. When I say the 4th one, I mean the 2nd one on my 2nd board. My 1st board works fine.
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ebereon
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June 20, 2012, 10:42:19 PM Last edit: June 21, 2012, 12:14:32 AM by ebereon |
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For me only temporary is working, can not programm with SPI. I got 280 - 350 Mh/s on p2pool. If someone is interessted in my changed icarusworker.py from mpbm, here is the download: http://content.wuala.com/contents/ebereon/Shared/bitcoin/mpbm_changed/icarusworker.py?dl=1edit: made a own worker, see https://bitcointalk.org/index.php?topic=78239.msg978580#msg978580I changed the calculation of the "self.stats.mhps" in line 329. I just divided it by 2. The mpbm is checking the reported Mh/s from the device and calculate the job interval. In the normal file it calculates 380Mh/s per fpga, but we know this is not correct it's just 190 or so. So the job interval is wrong and every job is canceled to early. That's what i changed in the file. The displayed Mh/s is now also correct. I hope it helps someone
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ebereon
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June 20, 2012, 10:48:05 PM |
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For me only temporary is working, can not programm with SPI. I got 280 - 350 Mh/s on p2pool. If someone is interessted in my changed icarusworker.py from mpbm, here is the download: http://content.wuala.com/contents/ebereon/Shared/bitcoin/mpbm_changed/icarusworker.py?dl=1I changed the calculation of the "self.stats.mhps" in line 329. I just divided it by 2. The mpbm is checking the reported Mh/s from the device and calculate the job interval. In the normal file it calculates 380Mh/s per fpga, but we know this is not correct it's just 190 or so. So the job interval is wrong and every job is canceled to early. That's what i changed in the file. The displayed Mh/s is now also correct. I hope it helps someone You can also change it in your file, just search for " self.stats.mhps = nonceval / 500000. / delta" and change it to " self.stats.mhps = (nonceval / 500000. / delta) / 2"
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ebereon
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June 20, 2012, 10:58:25 PM |
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Awesome!!
Also can somebody seed the .ova file via torrent?
For some reason I keep getting cut from the direct download site.
Thanks! I uploading it to wuala, will take some minutes. http://www.wuala.com/ebereon/Shared/bitcoin/cairnmore1/@yohan: If you don't want that your files uploaded on other sides, please give me a message, i will delete it
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norulezapply
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June 20, 2012, 10:59:10 PM |
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Ah gotcha. So really 3 of 8?
Yes, 3 out of 8 Gets a bit confusing talking about FPGAs and boards in the same sentence
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LazyOtto
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June 20, 2012, 11:01:04 PM |
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...I changed the calculation of the "self.stats.mhps" ...
You can also change it in your file ... NOTE: I don't have an FPGA miner, yet, so I'm asking from general interest. However, question, what about if you have a Quad XC connected and a BFL Single (or one of the other FPGAs currently available) connected? Does fixing the Quad with this tweak break the other(s)?
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ebereon
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June 20, 2012, 11:07:28 PM |
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...I changed the calculation of the "self.stats.mhps" ...
You can also change it in your file ... NOTE: I don't have an FPGA miner, yet, so I'm asking from general interest. However, question, what about if you have a Quad XC connected and a BFL Single (or one of the other FPGAs currently available) connected? Does fixing the Quad with this tweak break the other(s)? It's only a change in the icarusworker.py, so yes it will break working correctly with an icarus board. Others have there own files and should not get affected except the icarus. I wish TheSeven would make a own mpbm worker for the cairnsmore1 board, but i think we have to wait until this board work as it should. This is only a temporary solution!
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LazyOtto
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June 20, 2012, 11:30:15 PM |
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This is only a temporary solution!
And I think it is a fine temporary solution. Was merely asking for clarification. Which you provided, thank you.
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nedbert9
Sr. Member
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June 20, 2012, 11:32:32 PM |
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@Yohan.
Many people, including myself, are impressed with your operation.
I'm curious. If a semi-community funded ASIC solution were to come to fruition, where the chips could be had for a fair rate, would you find a business of producing rackmount/high capacity systems attractive?
I'm testing the waters for a possible synergistic effort.
Thanks.
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ebereon
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June 21, 2012, 12:04:46 AM Last edit: June 21, 2012, 12:16:09 AM by ebereon |
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Ok for those that work with mpbm, i made a quick change and have made a "cairnsmoreworker" for it! (copy from icarusworker with change) Download the files here: http://www.wuala.com/ebereon/Shared/bitcoin/mpbm_changed/Go in mpbm folder "..\mpbm\modules\theseven\", create a new folder named "cairnsmore" and put the files in it. If you restart mpbm you now will see a new worker "theseven.cairnsmore worker v0.1.0beta". It work the same as the icarus worker, but with my change for the job interval i've described earlier. So you can leave the icarusworker file untouched, so icarus boards will also work as befor. It's a temporary solution and work correct only with the bitstream "twin_test.bit".
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