AlexGR
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October 05, 2017, 09:10:54 PM |
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Anyone planning on testing the 7980XE?
The specs don't impress me and it's overpriced. It has a low base clock and a relatively small cache, both critical for CPU mining. Intel is known for better single threaded performance but that doesn't matter when mining. The 24 MB cache limits the number of threads mining cryptonight to 12, not even enough to load all the physical cores. A Threadripper 1920X (12C/24T, 32MB cache) will likely perform better for less than half the price. Compute intensive algos are irelevant because GPUs are much more efficient and CPUs can't comptete. The 7980XE doesn't yet have SHA support, unlike Ryzen, but that's less of an issue because there are few algos that can use it. It does have AVX512 but I don't see much benefit in that because it only improves compute performance. On those algos that could potentially use it the gain would be small, less than the gain from AVX to AVX2. There are fewer opportunities to promote AVX2 to AVX512 because AVX512 works on larger vectors, only algos that use vectors of 512 bits or greater can use it. I'm curious for some real results to compare, but I won't be bying one. Keep in mind that it extends the registers to 32 (xmm16-xmm31 / ymm16-ymm31 / zmm16-zmm31). If register pressure is an issue, it can help. It also offers masking with K registers which might be useful in some cases. One problem though is that avx512 gets underclocked... in a xeon system which worked around 2 - 2.1 ghz normal, and typical code execution was boosted at 2.6ghz, avx512 was running at ~1.8ghz. Google cloud has some servers with avx512 which you can play on without buying avx512 CPUs, but they kind of suck at benchmarking due to being VMs with unstable performance (resource sharing).
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joblo (OP)
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October 05, 2017, 10:12:15 PM |
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Anyone planning on testing the 7980XE?
The specs don't impress me and it's overpriced. It has a low base clock and a relatively small cache, both critical for CPU mining. Intel is known for better single threaded performance but that doesn't matter when mining. The 24 MB cache limits the number of threads mining cryptonight to 12, not even enough to load all the physical cores. A Threadripper 1920X (12C/24T, 32MB cache) will likely perform better for less than half the price. Compute intensive algos are irelevant because GPUs are much more efficient and CPUs can't comptete. The 7980XE doesn't yet have SHA support, unlike Ryzen, but that's less of an issue because there are few algos that can use it. It does have AVX512 but I don't see much benefit in that because it only improves compute performance. On those algos that could potentially use it the gain would be small, less than the gain from AVX to AVX2. There are fewer opportunities to promote AVX2 to AVX512 because AVX512 works on larger vectors, only algos that use vectors of 512 bits or greater can use it. I'm curious for some real results to compare, but I won't be bying one. Keep in mind that it extends the registers to 32 (xmm16-xmm31 / ymm16-ymm31 / zmm16-zmm31). If register pressure is an issue, it can help. It also offers masking with K registers which might be useful in some cases. One problem though is that avx512 gets underclocked... in a xeon system which worked around 2 - 2.1 ghz normal, and typical code execution was boosted at 2.6ghz, avx512 was running at ~1.8ghz. Google cloud has some servers with avx512 which you can play on without buying avx512 CPUs, but they kind of suck at benchmarking due to being VMs with unstable performance (resource sharing). Thanks for sharing your thoughts. I have not seen any register issues with the existing vectored code. The x, y & z regs are also overlaid in the 7980XE but only the lower 256 or 128 bits can be accessed by ymm or xmm respectively. This creates a lot of overhead when an app needs to revert to smaller vectors for some operations. Like I said there are fewer opportunities with larger vector operations. AVX & AVX2 are also underclocked, AVX512 is underclocked more. The K registers seem interesting. I don't fully understand them but they appear to be able to reduce the number of instructions when shuffling vector elements.
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AlexGR
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October 07, 2017, 05:53:47 PM |
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Anyone planning on testing the 7980XE?
The specs don't impress me and it's overpriced. It has a low base clock and a relatively small cache, both critical for CPU mining. Intel is known for better single threaded performance but that doesn't matter when mining. The 24 MB cache limits the number of threads mining cryptonight to 12, not even enough to load all the physical cores. A Threadripper 1920X (12C/24T, 32MB cache) will likely perform better for less than half the price. Compute intensive algos are irelevant because GPUs are much more efficient and CPUs can't comptete. The 7980XE doesn't yet have SHA support, unlike Ryzen, but that's less of an issue because there are few algos that can use it. It does have AVX512 but I don't see much benefit in that because it only improves compute performance. On those algos that could potentially use it the gain would be small, less than the gain from AVX to AVX2. There are fewer opportunities to promote AVX2 to AVX512 because AVX512 works on larger vectors, only algos that use vectors of 512 bits or greater can use it. I'm curious for some real results to compare, but I won't be bying one. Keep in mind that it extends the registers to 32 (xmm16-xmm31 / ymm16-ymm31 / zmm16-zmm31). If register pressure is an issue, it can help. It also offers masking with K registers which might be useful in some cases. One problem though is that avx512 gets underclocked... in a xeon system which worked around 2 - 2.1 ghz normal, and typical code execution was boosted at 2.6ghz, avx512 was running at ~1.8ghz. Google cloud has some servers with avx512 which you can play on without buying avx512 CPUs, but they kind of suck at benchmarking due to being VMs with unstable performance (resource sharing). Thanks for sharing your thoughts. I have not seen any register issues with the existing vectored code. Having more registers at your disposal is always nice - it allows for new possibilities in how you write the code - especially if there are a lot of variables or tables. The x, y & z regs are also overlaid in the 7980XE but only the lower 256 or 128 bits can be accessed by ymm or xmm respectively. This creates a lot of overhead when an app needs to revert to smaller vectors for some operations.
I think the problem is from xmm->ymm due to having 1x128 or 2x128 lanes which create a dependency issue, requiring the zeroing of the upper ymm part to use the xmm without a perf penalty. There's a lot of avx code that sucks without vzeroupper for this reason. IIRC ymm->zmm don't have the same issue, even if they overlap, but I may be wrong on this. But having +16 more registers is good for such scenarios also... in case you want to reuse a register which was previously overlapped, you just use a new one thus avoiding false dependencies altogether (assuming at least a vzeroupper or a vzeroall at the start of the function). AVX & AVX2 are also underclocked, AVX512 is underclocked more.
Something like that... The K registers seem interesting. I don't fully understand them but they appear to be able to reduce the number of instructions when shuffling vector elements.
There's a lot of things they can be used for. Essentially they perform partial operations on the full width of a register, but this can be pretty useful. You can avoid doing some stuff twice and blending the two different stuff, (as you can do it in one go), you can read memory up to X bytes by using the appropriate mask, etc. If you are using, say, a 512bit vector on 64bit elements, and want to perform something on 384 bits (6x64) you just put a 0b00111111 on the k register and then use the k register alongside with the instruction. Or you can do stuff like 0b01010101, thus working on first, third, fifth, seventh element and leaving the rest unchanged (or have it overwritten with zeroes on one go - depending the z flag setting, which is also new). Now that I'm thinking about this, and this is relevant to what you said earlier on xmm/ymm/zmm overlap and performance issues, one can use just one type of register (like zmm or ymm) for all types of operations, whether small or large, assuming they also use the appropriate k register to set the width they want. In this way false dependencies should be nullified even between xmm/ymm. You want to do 128bit op? You use a ymm register with a 0b00001111 (32bit elements) or 0b0011 (64bit elements) k-mask and the ymm is addressed as ymm on the 128bit lower part. Opcode will probably be somewhat larger though. K-regs are not too hard in their use, but I dislike the fact that they can't get fed with immediate values like general purpose registers and that I have to go immediate=>gpr=>k register or load values from memory. The only thing that took me a while to find out (I thought I was hitting a gcc bug) is how to properly write the instruction with the proper syntax, for gcc assembly-within-c... For example if I want to move 320 bits from memory to a zmm register it goes like this: "mov $0b1111111111, %%eax\n" (10 x 1 bit = 10 x 32 bit elements) "kmovd %%eax, %%k1\n" "vmovdqu32 0(%0), %%zmm0 %{%%k1%}%{z%}\n" The z flag is there to zero out the rest of the bits (if there was anything on zmm0).
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joblo (OP)
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October 10, 2017, 01:59:45 AM |
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sir4o
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October 10, 2017, 11:52:12 AM |
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Hiya, Is it possible to trottle with this miner, let's say to use cores at 50%?
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UspesenRudar
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October 10, 2017, 01:38:15 PM |
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-t defines number of cores --cpu-priority set process priority (default: 0 idle, 2 normal to 5 highest) --cpu-affinity set process affinity to cpu core(s), mask 0x3 for cores 0 and 1
with this parameters can you define how much is CPU working.
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guytechie
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October 10, 2017, 01:39:04 PM |
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Hi, I haven't been on here for a while now. Just wondering if the Windows binary is now compiled with SHA support working. I have both a Ryzen 1700 and a TR 1950X I'd like to fully utilize when there's down time, which both have hardware SHA acceleration if I am correct.
Thanks!
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Put something in my tip jar if I made your day. BTC: 1MkmBHDjonAFXui6JEx9ZmEemfMtUo9Cmu
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joblo (OP)
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October 10, 2017, 02:09:38 PM |
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Hi, I haven't been on here for a while now. Just wondering if the Windows binary is now compiled with SHA support working. I have both a Ryzen 1700 and a TR 1950X I'd like to fully utilize when there's down time, which both have hardware SHA acceleration if I am correct.
Thanks!
Unfortunately I can't yet compile with SHA. One user claims to have successfully done it on Windows but didn't share the procedure so I'm now skeptical.
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guytechie
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October 10, 2017, 02:34:38 PM |
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Hi, I haven't been on here for a while now. Just wondering if the Windows binary is now compiled with SHA support working. I have both a Ryzen 1700 and a TR 1950X I'd like to fully utilize when there's down time, which both have hardware SHA acceleration if I am correct.
Thanks!
Unfortunately I can't yet compile with SHA. One user claims to have successfully done it on Windows but didn't share the procedure so I'm now skeptical. Thanks for the update. It's a pity, as I hear m7m does much better with SHA optimizations.
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Put something in my tip jar if I made your day. BTC: 1MkmBHDjonAFXui6JEx9ZmEemfMtUo9Cmu
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ljglug
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October 10, 2017, 04:09:43 PM |
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This is the home of cpuminer-opt, The optimized CPU miner.cpuminer-opt now supports over 50 algorithms with more than 20 optimized to use AES_NI, AVX, AVX2 and SHA on capable CPUs. Source code:git: https://github.com/JayDDee/cpuminer-opttarball: https://drive.google.com/file/d/0B0lVSGQYLJIZdy1fQ2o5T1otXzQ/view?usp=sharingWindows binarieshttps://drive.google.com/file/d/0B0lVSGQYLJIZVWtXa1RZcE0wWEE/view?usp=sharingNew in v3.6.9Added phi1612 algo for LUX coin Added x13sm3 algo, alias hsr, for Hshare coin Legacy version 3.5.9.1 May provide better performance on some algos with older CPUs that don't have AES NI. Most users should not use it. git clone https://github.com/JayDDee/cpuminer-opt -b legacy Tarball: https://drive.google.com/file/d/0B0lVSGQYLJIZcDg0d0QzbzJBUDA/view?usp=sharingWindows Binaries: https://drive.google.com/file/d/0B0lVSGQYLJIZT0tlY3o4ZjEycXM/view?usp=sharingSecurity warningMiner programs are often flagged as malware by antivirus programs. This is a false positive, they are flagged simply because they are miners. The source code is open for anyone to inspect. If you don't trust the software, don't use it. The cryptographic code has been taken from trusted sources but has been modified for speed at the expense of accepted security practices. This code should not be imported into applications where secure cryptography is required. Errata:AMD CPUs older than Piledriver, including Athlon x2 and Phenom II x4, are not supported by cpuminer-opt due to an incompatible implementation of SSE2 on these CPUs. Some algos may crash the miner with an invalid instruction. Users are recommended to use an unoptimized miner such as cpuminer-multi. Solo mining of cryptonight does not work. Bench stats collection enabled (-p stats) when mining timetravel causes miner to exit after 50 share submissions. cpuminer-opt does not work mining Decred algo at Nicehash and produces only "invalid extranonce2 size" rejects. Benchmark testing does not work for x11evo. Requirements:1. A x86_64 architecture CPU with a minimum of SSE2 support. This includes Intel Core2 and newer and AMD equivalents. In order to take advantage of AES_NI optimizations a CPU with AES_NI is required. This includes Intel Westbridge and newer and AMD equivalents. Further optimizations are available on some algos for CPUs with AVX and AVX2, Sandybridge and Haswell respectively. Older CPUs are supported by cpuminer-multi by TPruvot but at reduced performance. 2. 64 bit Linux OS. Ubuntu and Fedora based distributions, including Mint and Centos are known to work and have all dependencies in their repositories. Others may work but may require more effort. 64 bit Windows OS is supported using the pre-compiled binaries package or may be compiled with mingw_w64 and msys. Hshare coin coins do not seem to be mine What is the updated algorithm for mining the coin?
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joblo (OP)
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October 11, 2017, 09:52:24 PM |
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New in v3.6.9
Added phi1612 algo for LUX coin Added x13sm3 algo, alias hsr, for Hshare coin
Hshare coin coins do not seem to be mine What is the updated algorithm for mining the coin? Thanks for reposting the first post but I've already read it, maybe you should read it too.
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Wh1teKn1ght
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October 12, 2017, 04:28:47 AM |
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Isn't AES, AVX better than SSE2? My CPU shows support for AES and AVX, yet the algo being used is SSE2. I am running the cpuminer-aes-avx.exe so why is it using SSE2 algo? Thanks
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nizzuu
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Cryptocurrency enthusiast
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October 12, 2017, 05:18:27 AM |
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Hi, the aes-avx2 windows binary build crashes on i5-7600 while using hsr algo (-t 4 -a hsr). No issues for aes-avx version.
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4ward
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October 12, 2017, 11:36:11 AM |
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Isn't AES, AVX better than SSE2? My CPU shows support for AES and AVX, yet the algo being used is SSE2. I am running the cpuminer-aes-avx.exe so why is it using SSE2 algo? Thanks Because algo supports SSE2 only
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joblo (OP)
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October 12, 2017, 12:21:39 PM |
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Hi, the aes-avx2 windows binary build crashes on i5-7600 while using hsr algo (-t 4 -a hsr). No issues for aes-avx version.
Looking into it.
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joblo (OP)
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October 12, 2017, 03:58:43 PM |
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ken-ray
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October 12, 2017, 11:25:34 PM |
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What is the lscpu or cat /proc/cpuinfo output for the coffee lake cpu?
Are SHA extensions supported like as in the apollo lake CPU?
Thank you for your help.
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joblo (OP)
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October 12, 2017, 11:48:14 PM |
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What is the lscpu or cat /proc/cpuinfo output for the coffee lake cpu?
Are SHA extensions supported like as in the apollo lake CPU?
Thank you for your help.
No SHA until Cannonlake.
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ken-ray
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October 12, 2017, 11:52:19 PM |
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I am still curious about AVX2 performance on Ryzen. I have read that their implementation isn't native but I haven't seen any performance comparisons. If anyone has a Ryzen I would be interested in a performance comparison of AVX vs AVX2 on algos that have AVX2 optimizations.
If you can list the algos you would like tested I can try it out on both Ryzen R7 1700X and R5 1600 CPUs. Possibly on Threadripper too towards the end of summer if I talk myself into getting one. Lyra2v2, Lyra2z and Deep have the most AVX2 and should see the biggest improvement. All the X algos, qubit, timetravel and a few others also have varying amounts of AVX2 code. Preliminary results: Ryzen 1700X @ stock settings with 8 threads set in the batch file. Lyra2v2 = 1001 Kh/s on avx2 = 1016 Kh/s on avx Timetravel = 799 Kh/s on avx2 = 843 Kh/s on avx X11 = 686 Kh/s on avx2 = 711 Kh/s on avx X17 = 294 Kh/s on avx2 = 294 Kh/s on avx X17 was the same for both options, but I was surprised to see avx beating avx2 for the other algorithms tested. My understanding was that it would likely be the other way around.... Please test the HW SHA for Ryzen. lbry sha256t skein myr-groestl m7m
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ken-ray
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October 13, 2017, 12:04:14 AM |
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I have never used docker before. How difficult is it to compile cpuminer-opt and run it in a container? With Ubuntu 16.04 container: ..[$] <()> for i in sha256t lbry skein myr-gr m7m; do docker run --rm miner --quiet --time-limit=30 --benchmark -a $i; done ********** cpuminer-opt 3.6.6 *********** A CPU miner with multi algo support and optimized for CPUs with AES_NI and AVX extensions. BTC donation address: 12tdvfF7KmAsihBXQXynT6E6th2c2pByTT Forked from TPruvot's cpuminer-multi with credits to Lucas Jones, elmad, palmd, djm34, pooler, ig0tik3d, Wolf0, Jeff Garzik and Optiminer. CPU: AMD Ryzen 5 1400 Quad-Core Processor CPU features: SSE2 AES AVX AVX2 SHA SW built on Jul 24 2017 with GCC 5.4.0 SW features: SSE2 AES AVX AVX2 SHA Algo features: SSE2 SHA Start mining with SSE2 SHA
[2017-07-24 08:57:26] 8 miner threads started, using 'sha256t' algorithm. [2017-07-24 08:57:26] Total: 1048.58 kH, 15.86 MH/s, 0C [2017-07-24 08:57:32] Total: 152.66 MH, 33.09 MH/s, 0C [2017-07-24 08:57:36] Total: 147.99 MH, 33.09 MH/s, 0C [2017-07-24 08:57:41] Total: 165.43 MH, 33.17 MH/s, 0C [2017-07-24 08:57:46] Total: 165.86 MH, 33.18 MH/s, 0C [2017-07-24 08:57:51] Total: 165.90 MH, 33.18 MH/s, 0C [2017-07-24 08:57:56] Total: 165.89 MH, 33.18 MH/s, 0C [2017-07-24 08:57:56] Total: 145.83 MH, 33.27 MH/s, 0C [2017-07-24 08:57:56] Total: 145.83 MH, 33.28 MH/s, 0C [2017-07-24 08:57:56] Total: 125.27 MH, 32.99 MH/s, 0C [2017-07-24 08:57:56] Total: 104.64 MH, 33.27 MH/s, 0C [2017-07-24 08:57:56] Total: 84.01 MH, 33.28 MH/s, 0C [2017-07-24 08:57:56] Total: 84.01 MH, 32.99 MH/s, 0C [2017-07-24 08:57:56] Total: 84.02 MH, 33.28 MH/s, 0C [2017-07-24 08:57:56] Total: 63.39 MH, 32.98 MH/s, 0C [2017-07-24 08:57:56] Total: 42.77 MH, 33.23 MH/s, 0C [2017-07-24 08:57:56] Total: 22.15 MH, 33.27 MH/s, 0C [2017-07-24 08:57:56] Total: 22.16 MH, 32.95 MH/s, 0C [2017-07-24 08:57:56] Total: 2097.15 kH, 33.40 MH/s, 0C [2017-07-24 08:57:56] Total: 2097.15 kH, 33.11 MH/s, 0C [2017-07-24 08:57:56] Total: 2097.15 kH, 33.02 MH/s, 0C [2017-07-24 08:57:57] Benchmark: 33.02 MH/s 33016420 ********** cpuminer-opt 3.6.6 *********** A CPU miner with multi algo support and optimized for CPUs with AES_NI and AVX extensions. BTC donation address: 12tdvfF7KmAsihBXQXynT6E6th2c2pByTT Forked from TPruvot's cpuminer-multi with credits to Lucas Jones, elmad, palmd, djm34, pooler, ig0tik3d, Wolf0, Jeff Garzik and Optiminer. CPU: AMD Ryzen 5 1400 Quad-Core Processor CPU features: SSE2 AES AVX AVX2 SHA SW built on Jul 24 2017 with GCC 5.4.0 SW features: SSE2 AES AVX AVX2 SHA Algo features: SSE2 SHA Start mining with SSE2 SHA [2017-07-24 08:57:57] 8 miner threads started, using 'lbry' algorithm. [2017-07-24 08:57:58] Total: 1048.58 kH, 5326.34 kH/s, 0C [2017-07-24 08:58:02] Total: 18.70 MH, 5537.04 kH/s, 0C [2017-07-24 08:58:06] Total: 12.34 MH, 5557.11 kH/s, 0C [2017-07-24 08:58:07] Total: 25.07 MH, 5558.93 kH/s, 0C [2017-07-24 08:58:12] Total: 24.99 MH, 5560.98 kH/s, 0C [2017-07-24 08:58:17] Total: 25.03 MH, 5556.29 kH/s, 0C [2017-07-24 08:58:22] Total: 27.78 MH, 5560.57 kH/s, 0C [2017-07-24 08:58:27] Total: 24.44 MH, 5569.10 kH/s, 0C [2017-07-24 08:58:28] Benchmark: 5569.10 kH/s 5569101 ********** cpuminer-opt 3.6.6 *********** A CPU miner with multi algo support and optimized for CPUs with AES_NI and AVX extensions. BTC donation address: 12tdvfF7KmAsihBXQXynT6E6th2c2pByTT Forked from TPruvot's cpuminer-multi with credits to Lucas Jones, elmad, palmd, djm34, pooler, ig0tik3d, Wolf0, Jeff Garzik and Optiminer. CPU: AMD Ryzen 5 1400 Quad-Core Processor CPU features: SSE2 AES AVX AVX2 SHA SW built on Jul 24 2017 with GCC 5.4.0 SW features: SSE2 AES AVX AVX2 SHA Algo features: SSE2 SHA Start mining with SSE2 SHA [2017-07-24 08:58:28] 8 miner threads started, using 'skein' algorithm. [2017-07-24 08:58:29] Total: 3670.02 kH, 9933.17 kH/s, 0C [2017-07-24 08:58:33] Total: 45.31 MH, 11.55 MH/s, 0C [2017-07-24 08:58:38] Total: 57.74 MH, 11.58 MH/s, 0C [2017-07-24 08:58:43] Total: 46.27 MH, 11.59 MH/s, 0C [2017-07-24 08:58:48] Total: 54.95 MH, 11.58 MH/s, 0C [2017-07-24 08:58:53] Total: 52.07 MH, 11.59 MH/s, 0C [2017-07-24 08:58:58] Total: 52.10 MH, 11.59 MH/s, 0C [2017-07-24 08:58:58] Total: 11.90 MH, 11.60 MH/s, 0C [2017-07-24 08:58:58] Total: 11.90 MH, 11.56 MH/s, 0C [2017-07-24 08:58:59] Benchmark: 11.56 MH/s 11562248
********** cpuminer-opt 3.6.6 *********** A CPU miner with multi algo support and optimized for CPUs with AES_NI and AVX extensions. BTC donation address: 12tdvfF7KmAsihBXQXynT6E6th2c2pByTT Forked from TPruvot's cpuminer-multi with credits to Lucas Jones, elmad, palmd, djm34, pooler, ig0tik3d, Wolf0, Jeff Garzik and Optiminer.
CPU: AMD Ryzen 5 1400 Quad-Core Processor CPU features: SSE2 AES AVX AVX2 SHA SW built on Jul 24 2017 with GCC 5.4.0 SW features: SSE2 AES AVX AVX2 SHA Algo features: SSE2 AES SHA Start mining with SSE2 AES SHA
[2017-07-24 08:59:00] 8 miner threads started, using 'myr-gr' algorithm. [2017-07-24 08:59:00] Total: 2097.15 kH, 5397.12 kH/s, 0C [2017-07-24 08:59:05] Total: 17.51 MH, 5452.93 kH/s, 0C [2017-07-24 08:59:06] Total: 21.72 MH, 5467.62 kH/s, 0C [2017-07-24 08:59:10] Total: 25.98 MH, 5466.69 kH/s, 0C [2017-07-24 08:59:15] Total: 25.28 MH, 5466.75 kH/s, 0C [2017-07-24 08:59:20] Total: 24.80 MH, 5465.82 kH/s, 0C [2017-07-24 08:59:25] Total: 26.64 MH, 5467.58 kH/s, 0C [2017-07-24 08:59:30] Total: 12.37 MH, 5468.40 kH/s, 0C [2017-07-24 08:59:30] Total: 5272.27 kH, 5463.15 kH/s, 0C [2017-07-24 08:59:31] Benchmark: 5463.15 kH/s 5463145
********** cpuminer-opt 3.6.6 *********** A CPU miner with multi algo support and optimized for CPUs with AES_NI and AVX extensions. BTC donation address: 12tdvfF7KmAsihBXQXynT6E6th2c2pByTT Forked from TPruvot's cpuminer-multi with credits to Lucas Jones, elmad, palmd, djm34, pooler, ig0tik3d, Wolf0, Jeff Garzik and Optiminer.
CPU: AMD Ryzen 5 1400 Quad-Core Processor CPU features: SSE2 AES AVX AVX2 SHA SW built on Jul 24 2017 with GCC 5.4.0 SW features: SSE2 AES AVX AVX2 SHA Algo features: SSE2 AES AVX SHA Start mining with SSE2 AES AVX SHA
[2017-07-24 08:59:31] 8 miner threads started, using 'm7m' algorithm. [2017-07-24 08:59:38] Total: 1048.58 kH, 159.87 kH/s, 0C [2017-07-24 08:59:43] Total: 799.38 kH, 159.68 kH/s, 0C [2017-07-24 08:59:48] Total: 798.43 kH, 159.47 kH/s, 0C [2017-07-24 08:59:53] Total: 797.34 kH, 159.35 kH/s, 0C [2017-07-24 08:59:58] Total: 796.75 kH, 159.65 kH/s, 0C [2017-07-24 09:00:01] Total: 478.95 kH, 159.87 kH/s, 0C 159872 [2017-07-24 09:00:07] Benchmark: 159.87 kH/s
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