We have to ask the chipmakers.
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I have deposits from the 13th that have yet to hit my bank account. I don't mind the wait, but I do mind having to come to bitcointalk to figure out what is going on.
Coinbase: Most people here are technical... we realize issues come up. As soon as you know of an issue that impacts users you should let everyone know. Its not like we don't notice!
Wow, this is completely unacceptable.
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btw I PM'ed Olaf today, no response about the situation yet.
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Seeing these charts after every bull run since Aug 2011
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Received my order today, but I'm not happy with it: 1. USB port at one board has soldering paste all over it and USB plug does not fit it, I need it because I want to use the board alone without CAN bus 2. other boards hash at 33-38 GH/s (mean: 34.25 GH/s) mean ~42 GH/s with parameters "--avalon-options 115200:16:10:d:256 --bitburner-voltage 1230"I tried various parameter settings with latest cgminer from git ( https://github.com/ckolivas/cgminer) as well as the one linked in the instruction manual ( https://github.com/someone42/cgminer.git). so: one board unusable, others way below "46-52" GH/s this is not acceptable Do your chips have Beta symbol or Bioinfobank ? Goxed, I am confused. Given the BioInfoBank labels on them, is this somehow related to what tytus et al have been building? I realize they are also working with Bitfury chips, but is the private label attributable to them, and if so how did it end up in a board in Belgium? By the way Fex, that soldering job is utterly hideous. I hope cryptx can replace or refund that board. Okay so there are some chips which have Beta printed on them and there are some chips with Bioinfobank printed on them. Some people claim that the chips which have Beta printed on them have slightly better quality.
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Do you think all chips are hashing? If yes I will buy the board from you for 1.2BTC shipped inside US. Thanks
Yes all chips should hash. I had it running before I broke the USB connector getting about 47 gh/s Okay great, I will buy it. pm'ed replied, thanks
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Do you think all chips are hashing? If yes I will buy the board from you for 1.2BTC shipped inside US. Thanks
Yes all chips should hash. I had it running before I broke the USB connector getting about 47 gh/s Okay great, I will buy it.
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Do you think all chips are hashing? If yes I will buy the board from you for 1.2BTC shipped inside US. Thanks
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Question to PCB designers: I submitted a Bitfury h board for fab and got the following message 1. It appears that your design has 9-12 mil holes, we require a minimum of 15mil drill with drill+10 pads for vias and drill+15 pads for mounting holes. 2. We found over 5 thousand isntances of 5.8-5.9 mil spacing, we require a minimum of 6mil spacing and no less than 6. Can someone comment if these changes can be easily done in Eagle? The only holes I can think of are on the vias, there should be somewhere where you can change the default via size to 15 mil holes with 10 mil pads No idea how to do it in eagle, i've always used diptrace. Hey thanks man Any idea why the via(s) were 9mil to begin with? I mean what gives on changing to 15mil? Obviously you want to make sure that the new larger vias don't short anything, and that you have clearance between them. They were probably 9 mil because the fab the designer was using could do 9 mil. I'm used to using oshpark and just about everything I design are at their minimums, and even then I have trouble with via spacing for things like tqfp-200s Thanks man! Also is there a quick fix way to change spacing or do i have to manually look at DRC errors and move the routes?
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Question to PCB designers: I submitted a Bitfury h board for fab and got the following message 1. It appears that your design has 9-12 mil holes, we require a minimum of 15mil drill with drill+10 pads for vias and drill+15 pads for mounting holes. 2. We found over 5 thousand isntances of 5.8-5.9 mil spacing, we require a minimum of 6mil spacing and no less than 6. Can someone comment if these changes can be easily done in Eagle? What did you send them, Gerber files or the original Eagle files? intron Gerber files generated from Eagle default CAM workflow Should work ok... Great! thanks for your input
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I have an ACH withdrawal from last Wednesday still showing pending (while at the same time telling me on the website it would be in my account last friday ... still). I am not happy, it was 39btc for $15,000(ish). Of course the bitterly ironic thing is btc skiyrocketing, so it isn't like they lost any money if they waited on selling the damned things.
We need a reliable and transparent alternative.
I smell Bait and Switch tactics or something terribly wrong somewhere.
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Question to PCB designers: I submitted a Bitfury h board for fab and got the following message 1. It appears that your design has 9-12 mil holes, we require a minimum of 15mil drill with drill+10 pads for vias and drill+15 pads for mounting holes. 2. We found over 5 thousand isntances of 5.8-5.9 mil spacing, we require a minimum of 6mil spacing and no less than 6. Can someone comment if these changes can be easily done in Eagle? Maybe problem is C-Scape use metric on design ? My PCB producer accept without any comment h-board design. I have a meeting in fab tomorrow afternoon (Thursday). From the initial quotation conclude that the cost of production and assembly will be attractive. The main problem is the availability and price of Bitfury chips. No reel in EU shop That's excellent. I am only building 2 boards to practice. That is why they want relaxed specifications. Would surely want to buy boards from you if they would be available quickly
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Question to PCB designers: I submitted a Bitfury h board for fab and got the following message 1. It appears that your design has 9-12 mil holes, we require a minimum of 15mil drill with drill+10 pads for vias and drill+15 pads for mounting holes. 2. We found over 5 thousand isntances of 5.8-5.9 mil spacing, we require a minimum of 6mil spacing and no less than 6. Can someone comment if these changes can be easily done in Eagle? What did you send them, Gerber files or the original Eagle files? intron Gerber files generated from Eagle default CAM workflow
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Question to PCB designers: I submitted a Bitfury h board for fab and got the following message 1. It appears that your design has 9-12 mil holes, we require a minimum of 15mil drill with drill+10 pads for vias and drill+15 pads for mounting holes. 2. We found over 5 thousand isntances of 5.8-5.9 mil spacing, we require a minimum of 6mil spacing and no less than 6. Can someone comment if these changes can be easily done in Eagle? The only holes I can think of are on the vias, there should be somewhere where you can change the default via size to 15 mil holes with 10 mil pads No idea how to do it in eagle, i've always used diptrace. Hey thanks man Any idea why the via(s) were 9mil to begin with? I mean what gives on changing to 15mil?
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Question to PCB designers: I submitted a Bitfury h board for fab and got the following message 1. It appears that your design has 9-12 mil holes, we require a minimum of 15mil drill with drill+10 pads for vias and drill+15 pads for mounting holes. 2. We found over 5 thousand isntances of 5.8-5.9 mil spacing, we require a minimum of 6mil spacing and no less than 6. Can someone comment if these changes can be easily done in Eagle?
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Question to PCB designers: I submitted a Bitfury h board for fab and got the following message 1. It appears that your design has 9-12 mil holes, we require a minimum of 15mil drill with drill+10 pads for vias and drill+15 pads for mounting holes. 2. We found over 5 thousand isntances of 5.8-5.9 mil spacing, we require a minimum of 6mil spacing and no less than 6. Can someone comment if these changes can be easily done in Eagle?
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Question to PCB designers: I submitted a Bitfury h board for fab and got the following message 1. It appears that your design has 9-12 mil holes, we require a minimum of 15mil drill with drill+10 pads for vias and drill+15 pads for mounting holes. 2. We found over 5 thousand isntances of 5.8-5.9 mil spacing, we require a minimum of 6mil spacing and no less than 6. Can someone comment if these changes can be easily done in Eagle?
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