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Author Topic: Avalon ASIC users thread  (Read 438333 times)
Photon939
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February 06, 2013, 11:24:34 PM
 #181

Normally, yes. Since Avalon is using QFN packages for their chips, there is a significant layer of plastic over top of the actual IC silicon. The bottom of the chip has a thermal pad and the circuit board usually has a bunch of copper plated vias underneath the chip. This means most of the heat transfer is done through the bottom of the chip. In most cases the PCB itself is used as a crappy heatsink but since these chips are dissipating a fairly large amount of power in a package not really designed for high power applications, they are likely using thermal pads and the large heatsink to pull heat from the back of the PCB.

Cooling could be increased by heatsinking the front of the chips as well, but this was likely cut since large heatsinks can get pretty expensive.
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klondike_bar
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February 07, 2013, 06:49:20 AM
 #182

^perfect response, thank you Smiley I am just used to layouts that draw the heat from the surface of the chip, not the underside

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February 07, 2013, 03:45:03 PM
 #183


Is that an image of a single 'module' of the three included as shipped in first batch, four max?
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February 07, 2013, 03:50:41 PM
 #184

Is that an image of a single 'module' of the three included as shipped in first batch, four max?
Yes, it is.
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February 07, 2013, 04:11:54 PM
 #185

Seymour Roger Cray from Cray Research would love that HW design ...


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February 07, 2013, 04:15:06 PM
 #186

Seymour Roger Cray from Cray Research would love that HW design ...



Needs more leather benches.
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February 07, 2013, 04:31:13 PM
 #187

Just looking THE Avalon threads up..

So this is still à USER thread instead of USERS thread ..Huh

Well i look up next week maybe someone else got their Asic by then ..!!!

GL  Roll Eyes


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February 07, 2013, 04:38:54 PM
Last edit: February 07, 2013, 05:03:19 PM by jjiimm_64
 #188

Just looking THE Avalon threads up..

So this is still à USER thread instead of USERS thread ..Huh

Well i look up next week maybe someone else got their Asic by then ..!!!

GL  Roll Eyes



when i name my db tables.  i name do do NOT name them plural.  

user table.   not users table, because each record is one user.

user.id

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jgarzik (OP)
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February 07, 2013, 05:00:30 PM
 #189


Avalon ASIC miner is currently surviving >24 hour stretches without restarting, now that we're on a stable pool with a reasonably high difficulty value (BTC Guild, difficulty 32.0).

However, have now seen the machine get "stuck" in a strange state, where it is not mining or restarting.  The fans ramp up, then ramp down, in a cycle.

Power cycling fixes the problem immediately, and the machine goes back to mining in >24 hour stretches again.

As a workaround, some pools have an "idle worker" notification system, to let you know when your miner disappears.


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February 07, 2013, 05:08:27 PM
 #190

jeff, does the cgminer interface have any configuration options? can you change the launch command?

i suppose you can ssh/telnet into the machine and run cgminer from the command line...would that manual instance show up in the GUI?
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February 07, 2013, 05:30:07 PM
 #191

jeff, does the cgminer interface have any configuration options? can you change the launch command?

i suppose you can ssh/telnet into the machine and run cgminer from the command line...would that manual instance show up in the GUI?

That is what the machine does during boot: run cgminer from the command line.  That is necessarily how it must be run under Linux Smiley

One only needs to edit /etc/rc.d/S99cgminer.  Here is a sample of S99cgminer:

Code:
DEVS=`find /dev/ -type c -name "ttyUSB*"  | sed 's/^/-S/' |  sed ':a;N;$!ba;s/\n/ /g'`
PARAMS=" $DEVS $POOL1 $POOL2 $POOL3 --avalon-options 115200:24:10:45:282 -q --api-allow "W:0/0" --api-listen "

ntpd -d -n -q -N -p 0.openwrt.pool.ntp.org \
-p 1.openwrt.pool.ntp.org -p 2.openwrt.pool.ntp.org -p 3.openwrt.pool.ntp.org && \
start-stop-daemon -S -x $APP -p $PID_FILE -m -b -- $PARAMS


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February 07, 2013, 05:39:33 PM
 #192

cool. looks like it should be trivial to add a usb hub + USB miner and start cgminer with additional devices.

is the usb cable hot-glued into the tplink board?
DeathAndTaxes
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February 07, 2013, 05:51:57 PM
 #193

How are the modules actually attached to the controller board?  The Avalon site indicated expansion to 6 modules was possible before scaling it back to 4.  Ia m just wondering if there is any limit ... with sufficient power and large enough chasis would 8 modules be possible, 10?
lastbit
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February 07, 2013, 05:57:13 PM
 #194

Seymour Roger Cray from Cray Research would love that HW design ...
Nah, he would have made the chips from Ga-As, include a small radiator in each chip's package and submerge the whole shebang in a force-pumped fluorocarbon bath.
And he would have designed the case like a flower with one petal missing, just for the lulz.
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February 07, 2013, 07:14:02 PM
 #195

Chip's power consumption is <6.6W/Ghs

ATX power loses(82%), DC/DC power loses(87%), Fan(5~20w), etc…

So…

650W * 0.82 * 0.87 - 20W = 443W, About right.

This is a business opportunity to make a high efficiency wall to dc converter.
Making a very focused product, well specified load and voltage, can allow the efficiency to be much higher.


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Epoch
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February 07, 2013, 07:34:10 PM
 #196

This is a business opportunity to make a high efficiency wall to dc converter.
Making a very focused product, well specified load and voltage, can allow the efficiency to be much higher.

Pragmatically, even if you manage to reduce power consumption by 45W you'd only be saving 1kWh per day. That's $0.11/day (depending on your local power costs, of course; I'm using $0.11/kWh).

Your yearly saving using such a device would be $40. A 'wall-to-dc converter' designed for a ~600W load would cost many times more than that. Sales volume would be low, since it would have little or no use beyond this niche application; so amortizing the non-recoverable engineering costs to design it would bump the per-unit price even further. Not to mention the expense of UL/CE certification that would be required.

Such a product would be unlikely to ever pay for itself.
MrTeal
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February 07, 2013, 08:04:00 PM
 #197

Chip's power consumption is <6.6W/Ghs

ATX power loses(82%), DC/DC power loses(87%), Fan(5~20w), etc…

So…

650W * 0.82 * 0.87 - 20W = 443W, About right.

This is a business opportunity to make a high efficiency wall to dc converter.
Making a very focused product, well specified load and voltage, can allow the efficiency to be much higher.

http://www.newegg.com/Product/Product.aspx?Item=N82E16817377002
http://www.newegg.com/Product/Product.aspx?Item=N82E16817292058

There's a lot of server PSUs with a single 12V rail that are extremely efficient. You won't easily find a power supply that rectifies 120/240V AC down to 1.2V directly. It just becomes too difficult to have such a large difference between input and output voltage, and to deal with 500-1000A of current on the 1.2V rail.
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February 07, 2013, 09:07:11 PM
 #198

Normally, yes. Since Avalon is using QFN packages for their chips, there is a significant layer of plastic over top of the actual IC silicon. The bottom of the chip has a thermal pad and the circuit board usually has a bunch of copper plated vias underneath the chip. This means most of the heat transfer is done through the bottom of the chip. In most cases the PCB itself is used as a crappy heatsink but since these chips are dissipating a fairly large amount of power in a package not really designed for high power applications, they are likely using thermal pads and the large heatsink to pull heat from the back of the PCB.

BFL was going to do something similar, according to the photos that have been posted to date.  They ended up switching to FCBGA packaging to get better heat removal, but that ended up putting their shipping schedule even further behind than it already was.

(Whether they would've been first-to-ship if they hadn't made this change is anybody's guess at this point.)

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February 08, 2013, 03:56:23 AM
 #199

jeff, does the cgminer interface have any configuration options? can you change the launch command?

i suppose you can ssh/telnet into the machine and run cgminer from the command line...would that manual instance show up in the GUI?

That is what the machine does during boot: run cgminer from the command line.  That is necessarily how it must be run under Linux Smiley

One only needs to edit /etc/rc.d/S99cgminer.  Here is a sample of S99cgminer:

Code:
DEVS=`find /dev/ -type c -name "ttyUSB*"  | sed 's/^/-S/' |  sed ':a;N;$!ba;s/\n/ /g'`
PARAMS=" $DEVS $POOL1 $POOL2 $POOL3 --avalon-options 115200:24:10:45:282 -q --api-allow "W:0/0" --api-listen "

ntpd -d -n -q -N -p 0.openwrt.pool.ntp.org \
-p 1.openwrt.pool.ntp.org -p 2.openwrt.pool.ntp.org -p 3.openwrt.pool.ntp.org && \
start-stop-daemon -S -x $APP -p $PID_FILE -m -b -- $PARAMS

Just in case you didn't realise ... "W:0/0" means anyone with local or remote network access to the device can do whatever they like ... including adding their own pools/workers, changing pool priorities ... etc

Though that also means you yourself can also do any API commands to it from any computer with network access (including restart/quit/...)

Normally you'd set it to --api-allow "W:127.0.0.1" or --api-allow "W:127.0.0.1,W:192.168.0/24" (or whatever your subnet is)

... and in case you didn't know ... with your current setup try this from another Linux box Smiley
echo -n 'summary' | nc IPOfAvalon 4028 | tr "|," "\n"

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February 08, 2013, 12:00:04 PM
 #200

Seymour Roger Cray from Cray Research would love that HW design ...
Nah, he would have made the chips from Ga-As, include a small radiator in each chip's package and submerge the whole shebang in a force-pumped fluorocarbon bath.
And he would have designed the case like a flower with one petal missing, just for the lulz.

+1 on the Gallium Arsenide

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