No embedded board is going to cost less than a rPi.
Well, the above is probably true. But I don't think additional $50 for a better hardware controller module would matter much.
Several people enumerated advantages of rPi. But this thing has also a lot of drawbacks for the hardware-oriented developer:
1) GPIO pins are weak/insensitive/slow/generally rather low signal quality
2) lack of high-quality and high-productivity low-level/close-to-the metal debugging tools
3) whatever debugging tools are available are seriously hampered by the closed-source and anti-reverse-engineering approach from the BroadCom about the BCM2835 chip architecture
4) The true/main CPU of rPI is VideoCore, the ARM is a peripheral/attached CPU. Under Linux only the small subset of VideoCore is available as a GPU and some power controller. This is a serious drawback when developing/debugging the board-level reset sequencing.
5) Ethernet goes through the internal USB including both hardware hub and software translation layer. Another major drawback during debugging.
I agree with that FPGA chip probably has little use in the normal operation of the miner. It kinda depends on the details of the communciation protocol, apparently Avalon uses one small Xilinx FPGA per 10 hashing chips.
But during the debugging/prototyping/initial-rollout of the miner FPGA is a godsend. With Altera SignalTap (equivalent of Xilinx Chipscope) it is like having a high-quality high-speed logic analyzer for almost free. This is a tremendous help when working on a project where shortest time-to-market is the top objective.
I don't have any specific information about internal design choices of ORSoC. I'm very familiar with competitors' DIMM SoC hardware controllers and I can credit them with
at least order-of-magnitude time and effort savings when doing chip-level development. For this particular purpose rPi could be considered a serious step back even in comparison with the hobbyist-level hardware like the BeagleBoard/BeagleBone.
