Swedish ASIC miner company kncminer.com

[ImI]

At the end of the Day, the only thing we need to be concern is can we get our miners in September 2013? ? Can we get them? How many of us are 100% confident without a doubt??

If you are confident without a doubt you are probably insane. There is no 100% guarantee for it (or anything really), but according to KNC they are still on track to deliver in September.

Scary even you yourself not 100% sure you will get your miner on time??

LOL! Dude go ahead and buy a BMW and you wont be 100% sure that is arrives in time.

So whats this 100%-sure shit about? Ever heard of things called risk and reward? No? Well than you better go and try to understand those things first...

Darn.  Apparently even eve is a dude. 

These days you aint sure about nothing... 

[Zubilica]

pffff...i just found out if you pay in bitcoins somehow the VAT suddenly dissapears.. this is a bit bullshit in my opinion...

when i order i get



When i enter bitpay it subtracts the VAT... what the hell.. i payed VAT for 2 Jupiter's for nothing!?

I paid with Bitpay and the VAT was not subtracted, I had to pay $ 2,504.25, for delivery inside the EU.

If you think about it. Payment was made from a US company (BitPay) for a delivery in EU . No VAT

[HyperMega]

"Damned if you do, damned if you don't!" is said very often here.
But "Damned if you do it not right!" would fit much better in this case.

Why did KnC publish these technical slides without any comments? In this way they say almost nothing about the feasibility of their concept and the overall project status. Just a nice slide show to let customers with no or little technical background feel good. This automatically causes a lot of wild speculation. So why not add enough information to make the slides self-explanatory, e.g.:

Slide 2: ASIC schematic
192 (48 x 4) engine IP cores (pipelined SHA256 hash cores, one hash per clock cycle)
-> running at minimum 520MHz@0.9V to realize 100 GH/s per die (could be higher in case of defect cores)

Slide 3: ASIC Toplevel Floorplan View
-> ASIC requires hierarchical layout flow to handle complexity (millions of standard cells)
-> complex engine IP (multi-million gates) "hardened" first; seen as multiple instantiated cells at ASIC toplevel
-> 0.6 mm2 per engine IP results in about 115 mm2 die size
(BTW: PLL arrow points to wrong location, should be probably rectangle with red halo at the right side)

Slide 4: Engine IP floorplan
-> engine IP hardened 2x with different shapes for area optimization at toplevel
-> bigger notch of 2nd engine IP macro used as placement area for PLL at toplevel (2nd macro placed 2 times at the right side of each quad)
-> "magic" pattern caused by timing driven placement of standard cells related to pipeline stages; just a funny visual effect

Slide 7: Thermal simulation
-> Assumption: 200W power consumption (based on worst case power analysis @ 1.0V & 30 % over clocked)
-> Simulation result: die junction temperature does not exceed 125C

Disclaimer: These are no official KnC information. Just a proposal and educated guesses of an ASIC design engineer how to publish such stuff in a more professional way.
 
Anyway, the most important question regarding the project schedule and the feasibility of the announced start date for delivery is:
When was the tape-out of the ASIC executed? If not executed yet, when is the tape-out planned for?

[titomane]

Now that there is new data on die size, I updated the GH/wafer table:

Code:

wafer(mm)   chip         process(nm)  die(mm^2)   GH/s(per die)      DpW   GH/s(per wafer)
300         KnC              28        441,00          25            128          3200,00
300         bitfury          55         14,44           2           4717          9434,00
300         bfl              65         56,25           4           1167          4668,00
300         asciminer(?)    130         17,50           0,333       3877          1291,04
300         avalon          110         16,13           0,282       4214          1188,35
300         asciminer(?)    130         21,7            0,333       3112          1036,30
(DpW, die per wafer; yield percentage not taken into account)

Die size is less than 336mm2.
I think 18x18mm

[HyperMega]

Sorry, but this KnC die areas ist most likely not correct. The table should be corrected.

There is an easy rule of thumb to estimate the silicon area of a pipelined SHA256 core in 28nm. From every technology node (half node) to the next, one will get approximately 2x more logic on the same area.
From 65nm(55nm) -> 45nm(40nm) -> 32nm(28nm) you will get 4x more logic on the same area. Meaning you will need 1/4 of area for the same logic.
BFL die is about 50 mm2 with 16 cores. Removing some overhead for pad frame and supporting logic a single core in 65nm should be about 3mm2. Scaling this down to 28nm would result in 0.75mm2 per core.

Based on my experience an automatic place&route with an high density standard cell library gives you in many cases better results in terms of area/power/timing than this "old school" hand layout done by BFL (sorry Josh ), especially for advanced nodes implementations. That's why I assume 0.6mm2 per KnC core.
For 192 cores (engine IPs) this results in about 115 mm² overall die area, which is still huge for 28nm (equivalent to 460 mm2 in 65nm).
Ok, at the end there are still some mm2 to add for support logic, but for sure not more than 5mm2. So in sum not more than 120 mm2. This is what they have to reach, otherwise they would not take use of the full advantage of the 28nm technology.

The complete calculation is based on the assumption that an KnC engine IP is more or less the same as a widely known pipelined SHA256 hash core. If the KnC IP is more efficient, the die area could even be less than 120 mm2.

[Meizirkki]

Thank you HyperMega. This thread really needed some objective and useful content. 

[shmadz]

Preamble: I am relatively certain that KNC Miner is not a scam. (about 75% certainty) I have serious doubts that they will meet their targets/estimates in terms of hashrate and delivery dates. (less that 50% certainty) but I am considering taking a risk on the new Mercury device... (pretty affordable entry level device, limits my risk to acceptable levels.)

Question: What do the little grey numbers below the various products mean? You can see them from the "Miners" tab on this page -> https://www.kncminer.com/categories/miners

Currently there is a 12 below the Mercury, a 34 below the Saturn and a 250 below Jupiter. Does this number mean anything? I assume it has *some* kind of meaning, or else why is it there?

If I were to assume I would guess that this number represents the number of orders, but I would appreciate some clarification on this before I throw 25+ bitcoin on this gamble.

Any educated guesses are welcome, but clarification from a KnC official would be preferred.

-Thank you.

[HyperMega]

Now that there is new data on die size, I updated the GH/wafer table:

Code:

wafer(mm)   chip         process(nm)  die(mm^2)   GH/s(per die)      DpW   GH/s(per wafer)
300         KnC              28        441,00          25            128          3200,00
300         bitfury          55         14,44           2           4717          9434,00
300         bfl              65         56,25           4           1167          4668,00
300         asciminer(?)    130         17,50           0,333       3877          1291,04
300         avalon          110         16,13           0,282       4214          1188,35
300         asciminer(?)    130         21,7            0,333       3112          1036,30
(DpW, die per wafer; yield percentage not taken into account)

Die size is less than 336mm2.
I think 18x18mm

Another detail for a better table. As far as I know, 130nm(110nm) are still manufactured based on 200mm wafers. 65nm(55nm) nodes were the first built with 300mm.

[dwdoc]

Preamble: I am relatively certain that KNC Miner is not a scam. (about 75% certainty) I have serious doubts that they will meet their targets/estimates in terms of hashrate and delivery dates. (less that 50% certainty) but I am considering taking a risk on the new Mercury device... (pretty affordable entry level device, limits my risk to acceptable levels.)

Question: What do the little grey numbers below the various products mean? You can see them from the "Miners" tab on this page -> https://www.kncminer.com/categories/miners

Currently there is a 12 below the Mercury, a 34 below the Saturn and a 250 below Jupiter. Does this number mean anything? I assume it has *some* kind of meaning, or else why is it there?

If I were to assume I would guess that this number represents the number of orders, but I would appreciate some clarification on this before I throw 25+ bitcoin on this gamble.

Any educated guesses are welcome, but clarification from a KnC official would be preferred.

-Thank you.

It's the SKU code.

http://en.wikipedia.org/wiki/Stock_keeping_unit

[shmadz]

Preamble: I am relatively certain that KNC Miner is not a scam. (about 75% certainty) I have serious doubts that they will meet their targets/estimates in terms of hashrate and delivery dates. (less that 50% certainty) but I am considering taking a risk on the new Mercury device... (pretty affordable entry level device, limits my risk to acceptable levels.)

Question: What do the little grey numbers below the various products mean? You can see them from the "Miners" tab on this page -> https://www.kncminer.com/categories/miners

Currently there is a 12 below the Mercury, a 34 below the Saturn and a 250 below Jupiter. Does this number mean anything? I assume it has *some* kind of meaning, or else why is it there?

If I were to assume I would guess that this number represents the number of orders, but I would appreciate some clarification on this before I throw 25+ bitcoin on this gamble.

Any educated guesses are welcome, but clarification from a KnC official would be preferred.

-Thank you.

It's the SKU code.

http://en.wikipedia.org/wiki/Stock_keeping_unit

ok, makes sense to me, thanks.

[Rampion]

Anyway, the most important question regarding the project schedule and the feasibility of the announced start date for delivery is:
When was the tape-out of the ASIC executed? If not executed yet, when is the tape-out planned for?

Be careful dude, I made that question for weeks and I was lynched by the wishful thinkers and wet dreamers

[Vycid]

Now that there is new data on die size, I updated the GH/wafer table:

Code:

wafer(mm)   chip         process(nm)  die(mm^2)   GH/s(per die)      DpW   GH/s(per wafer)
300         KnC              28        441,00          25            128          3200,00
300         bitfury          55         14,44           2           4717          9434,00
300         bfl              65         56,25           4           1167          4668,00
300         asciminer(?)    130         17,50           0,333       3877          1291,04
300         avalon          110         16,13           0,282       4214          1188,35
300         asciminer(?)    130         21,7            0,333       3112          1036,30
(DpW, die per wafer; yield percentage not taken into account)

Die size is less than 336mm2.
I think 18x18mm

Another detail for a better table. As far as I know, 130nm(110nm) are still manufactured based on 200mm wafers. 65nm(55nm) nodes were the first built with 300mm.

Ummmm. KnC is doing a 28nm process and getting only a third of the GH/s per wafer that bitfury is getting at 55nm?

[minternj]

Now that there is new data on die size, I updated the GH/wafer table:

Code:

wafer(mm)   chip         process(nm)  die(mm^2)   GH/s(per die)      DpW   GH/s(per wafer)
300         KnC              28        441,00          25            128          3200,00
300         bitfury          55         14,44           2           4717          9434,00
300         bfl              65         56,25           4           1167          4668,00
300         asciminer(?)    130         17,50           0,333       3877          1291,04
300         avalon          110         16,13           0,282       4214          1188,35
300         asciminer(?)    130         21,7            0,333       3112          1036,30
(DpW, die per wafer; yield percentage not taken into account)

Die size is less than 336mm2.
I think 18x18mm

Another detail for a better table. As far as I know, 130nm(110nm) are still manufactured based on 200mm wafers. 65nm(55nm) nodes were the first built with 300mm.

Ummmm. KnC is doing a 28nm process and getting only a third of the GH/s per wafer that bitfury is getting at 55nm?

its ok, all the knc supporters tell me that its not an issue. Since they dont care about power i guess, which leads me to the conclusion that they have unlimited power capacity at their mining location. Oh ya they will also say that the power usage predictions are the worst case scenario so it can be better than bitfury when released.

[Mota]

Now that there is new data on die size, I updated the GH/wafer table:

Code:

wafer(mm)   chip         process(nm)  die(mm^2)   GH/s(per die)      DpW   GH/s(per wafer)
300         KnC              28        441,00          25            128          3200,00
300         bitfury          55         14,44           2           4717          9434,00
300         bfl              65         56,25           4           1167          4668,00
300         asciminer(?)    130         17,50           0,333       3877          1291,04
300         avalon          110         16,13           0,282       4214          1188,35
300         asciminer(?)    130         21,7            0,333       3112          1036,30
(DpW, die per wafer; yield percentage not taken into account)

Die size is less than 336mm2.
I think 18x18mm

Another detail for a better table. As far as I know, 130nm(110nm) are still manufactured based on 200mm wafers. 65nm(55nm) nodes were the first built with 300mm.

Ummmm. KnC is doing a 28nm process and getting only a third of the GH/s per wafer that bitfury is getting at 55nm?

its ok, all the knc supporters tell me that its not an issue. Since they dont care about power i guess, which leads me to the conclusion that they have unlimited power capacity at their mining location. Oh ya they will also say that the power usage predictions are the worst case scenario so it can be better than bitfury when released.

um.... Yeah? If you had read some more in here you would know that they like to understate specs instead of giving specs that look good but can't be made into reality...

[minternj]

I have read thats why i already knew your answer

Oh ya they will also say that the power usage predictions are the worst case scenario ....

[Vycid]

Now that there is new data on die size, I updated the GH/wafer table:

Code:

wafer(mm)   chip         process(nm)  die(mm^2)   GH/s(per die)      DpW   GH/s(per wafer)
300         KnC              28        441,00          25            128          3200,00
300         bitfury          55         14,44           2           4717          9434,00
300         bfl              65         56,25           4           1167          4668,00
300         asciminer(?)    130         17,50           0,333       3877          1291,04
300         avalon          110         16,13           0,282       4214          1188,35
300         asciminer(?)    130         21,7            0,333       3112          1036,30
(DpW, die per wafer; yield percentage not taken into account)

Die size is less than 336mm2.
I think 18x18mm

Another detail for a better table. As far as I know, 130nm(110nm) are still manufactured based on 200mm wafers. 65nm(55nm) nodes were the first built with 300mm.

Ummmm. KnC is doing a 28nm process and getting only a third of the GH/s per wafer that bitfury is getting at 55nm?

its ok, all the knc supporters tell me that its not an issue. Since they dont care about power i guess, which leads me to the conclusion that they have unlimited power capacity at their mining location. Oh ya they will also say that the power usage predictions are the worst case scenario so it can be better than bitfury when released.

um.... Yeah? If you had read some more in here you would know that they like to understate specs instead of giving specs that look good but can't be made into reality...

BFL had more per wafer also, and they have been getting chips made for a while now... So it most certainly has been "made into reality", for less, at an inferior process node.

[erk]

Now that there is new data on die size, I updated the GH/wafer table:

Code:

wafer(mm)   chip         process(nm)  die(mm^2)   GH/s(per die)      DpW   GH/s(per wafer)
300         KnC              28        441,00          25            128          3200,00
300         bitfury          55         14,44           2           4717          9434,00
300         bfl              65         56,25           4           1167          4668,00
300         asciminer(?)    130         17,50           0,333       3877          1291,04
300         avalon          110         16,13           0,282       4214          1188,35
300         asciminer(?)    130         21,7            0,333       3112          1036,30
(DpW, die per wafer; yield percentage not taken into account)

Die size is less than 336mm2.
I think 18x18mm

Another detail for a better table. As far as I know, 130nm(110nm) are still manufactured based on 200mm wafers. 65nm(55nm) nodes were the first built with 300mm.

Ummmm. KnC is doing a 28nm process and getting only a third of the GH/s per wafer that bitfury is getting at 55nm?

What's more concerning is the 25GH/s per die. Where is the data that says they are using 4 dies per package?

[Kuroth]

Silly Trolls, Tricks are for Kids..


Josh is that you???    Oh my...

[Mota]

Now that there is new data on die size, I updated the GH/wafer table:

Code:

wafer(mm)   chip         process(nm)  die(mm^2)   GH/s(per die)      DpW   GH/s(per wafer)
300         KnC              28        441,00          25            128          3200,00
300         bitfury          55         14,44           2           4717          9434,00
300         bfl              65         56,25           4           1167          4668,00
300         asciminer(?)    130         17,50           0,333       3877          1291,04
300         avalon          110         16,13           0,282       4214          1188,35
300         asciminer(?)    130         21,7            0,333       3112          1036,30
(DpW, die per wafer; yield percentage not taken into account)

Die size is less than 336mm2.
I think 18x18mm

Another detail for a better table. As far as I know, 130nm(110nm) are still manufactured based on 200mm wafers. 65nm(55nm) nodes were the first built with 300mm.

Ummmm. KnC is doing a 28nm process and getting only a third of the GH/s per wafer that bitfury is getting at 55nm?

its ok, all the knc supporters tell me that its not an issue. Since they dont care about power i guess, which leads me to the conclusion that they have unlimited power capacity at their mining location. Oh ya they will also say that the power usage predictions are the worst case scenario so it can be better than bitfury when released.

um.... Yeah? If you had read some more in here you would know that they like to understate specs instead of giving specs that look good but can't be made into reality...

BFL had more per wafer also, and they have been getting chips made for a while now... So it most certainly has been "made into reality", for less, at an inferior process node.

Pray tell, where exactly did I mention BFL? funny thing that you mention them... I only told you what KNC stated, which is only that they don't like to give specs they can't deilver,
Please stay focused on topic, you sound like a kid with OH A CUTE LITTLE DOGGIE... if you catch my drift.

[Ytterbium]

Anyone know if these things have Wifi?