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1561
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Other / Off-topic / Re: Just what is a clock buffer anyway?
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on: November 29, 2012, 06:02:22 PM
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OK, those explanations make good sense, and are more or less in line with what I expected.
I imagine that a clock buffer, at one end, receives the signal from a clock source and demodulates it (digitizes it, quantizes it, whatever). Then, based on its now digital interpretation of the input signal, it creates one or more new signals (maybe it has multiple outputs), which may have different characteristics than the input signal, such as amplitude (voltage), wave shape, and probably a delay (offset) relative to the input signal.
I can see this being does at the board level, but does it make sense also at the chip die level?
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1562
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Other / Off-topic / Re: Butterfly Labs November Update (ASIC Chips are "flawed". Delays.)
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on: November 29, 2012, 03:57:17 AM
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We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further.
Sense most comments are pessimistic let me try to be optimistic by asking a question.. Is it possible that BFL is pushing their upper clock limit from 1 GHz to 1.5 GHz or even 2 GHz to squash the competition? If that were the case, wouldn't they have just said so from the moment the delay was announced? Instead we get some odd-sounding statement about them adding a few more nines onto their 99.999% chance of success. And that's saying nothing of the damage caused just by any delay whatsoever, regardless of its cause. Time is money in this game, more so than 'most anywhere else. |
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1563
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Other / Off-topic / Just what is a clock buffer anyway?
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on: November 29, 2012, 12:32:13 AM
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Hi Everyone,
We've been very busy recently, unfortunately I couldn't catch up with the forums. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. We'll keep you posted. If you had any questions, please let us know.
Regards,
Nasser
So just what is a clock buffer? What does one do, where is BFL likely to be adding them to their product, how many will they be adding, and why that number and location? From the name, I can imagine some of the things one might do. I could just google it, but discussing it here sounds like more fun. Discuss. |
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1564
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Other / Off-topic / Re: Butterfly Labs November Update (ASIC Chips are "flawed". Delays.)
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on: November 29, 2012, 12:20:20 AM
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How many iterations do you suppose there have been already? Do you suppose they were all high-volume "bullet runs", each with its own full-wafer mask set?
This whole "bullet run" story Inaba/BFL_Josh told us stinks. You don't pay shitloads of money to bullet run a full lot (batch) of wafers just to figure out that your design is borked. There are always test wafers and test runs. Once your chip is OK (working prototype) you go into mass production. Sane Conservative hardware developers don't do things that way, but maybe BFL does? It's pretty apparent by now that BFL as a whole seems to have a bit of a "cowboy attitude", much as is shown on their public face. |
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1565
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Other / Off-topic / Re: Butterfly Labs November Update (ASIC Chips are "flawed". Delays.)
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on: November 28, 2012, 11:50:06 PM
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Hi Everyone,
We've been very busy recently, unfortunately I couldn't catch up with the forums. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. We'll keep you posted. If you had any questions, please let us know.
Regards,
Nasser
Okay, so 'BFL-Josh' says 'There was a flaw in the chip that needed to be addressed' .. and now there isn't? Get on the same page, people. Thats marketing speak and damage limitation. I read it as voltage leakage (which is, as i understand it a risk on 65nm process). Either way it means chips are not in full production yet and issues are still being ironed out. IOW, a respin. How many iterations do you suppose there have been already? Do you suppose they were all high-volume "bullet runs", each with its own full-wafer mask set? If it means a respin, the "week of the 11th" seems too soon, when it took 25+ days the last time. |
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1566
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Other / Off-topic / Re: Butterfly Labs November Update (ASIC Chips are "flawed". Delays.)
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on: November 28, 2012, 06:57:12 PM
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Hi Everyone,
We've been very busy recently, unfortunately I couldn't catch up with the forums. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. We'll keep you posted. If you had any questions, please let us know.
Regards,
Nasser
You said the same thing yesterday on the BFL forums. It doesn't make any more sense when you say it again here today. If you haz chips that are not critically flawed, Y U no ship dem? If they don't perform up to spec, that is indeed a flaw. Yet you say there is no flaw? Hearing things like this that don't make sense is making the flocks restless. |
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1567
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Bitcoin / Hardware / Re: bad news for bASIC - not shipping til mid Jan at best
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on: November 28, 2012, 03:53:40 AM
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Has BFL actually given a hard release date yet?
No need, their voodoo dept is working 24/7 to push everybody else two three months in 2013.  And it's working, dammit! Almost a month after BFL. I'm sorry, I really am. I like the competition, but I'm glad I choose BFL.
Has BFL actually given a hard release date yet? Josh said yesterday the week of the 11th. I'm REALLY hoping he meant December.  I think Josh was saying the (later part of) the week of the 11th as when they would get the chips in from the foundry. I wouldn't expect them to ship anything to customers until a week before Christmas. The "week of the 11th" is also a "fuzzy date", which almost always means the real date is later. If a "bullet run" took 25 days, how could they possibly do better this time around? Looks like it's gonna get interesting, with bASIC and Avalon both targeting mid-Jan now. Then there's still ASICMINER. I don't think the whole exchange collapsing really impacted their development schedule much if any. Last I heard their plans are still moving forward. |
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1568
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Bitcoin / Hardware / Re: Mobile car-based mining operation entirely possible
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on: November 28, 2012, 03:41:39 AM
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Once when my grid power was out for an extended period, I hooked a 1500W sine wave inverter to my car, and ran my fridge, a couple computers, and some other things on it for maybe 7 hours. It burned through quite a bit of fuel. Maybe 5 gallons. That was on a BMW 6 cylinder EFI engine...
Nowhere near as cost effective as grid power.
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1569
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Other / Off-topic / Re: Already delays in BFL shipment plans?
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on: November 28, 2012, 02:14:26 AM
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I'm going to predict BFL eventually announces delays into January, their latest explanations + revised timeline appear irrationally optimistic.
What's irrational is their explanation for the delay. "Oh, there's no flaw in the chips, but we're scrapping the lot of them anyway to make new ones with some added clock buffers." How much sense does that make? |
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1571
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Other / Off-topic / Re: Already delays in BFL shipment plans?
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on: November 27, 2012, 11:16:32 PM
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If Nasser is telling the truth, wouldn't it mean that either a) the chips haven't even been produced yet or b) the bullet run for the chips happened but they're going to scrap all the chips from that run and another bullet run (which will happen fuck knows when) will be needed to produce the chips with the new design?
Until ASICs start shipping in volume, that batch of chips is like a pile of plutonium, just waiting for someone to make off with them and start hashing with them. With 20k of those chips, even if they only perform at half their advertised speed, one could easily control > 50% of the network hashing power. Let's beat the rush and start panicking now. |
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1572
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Other / Off-topic / Re: Butterfly Labs November Update (ASIC Chips are "flawed". Delays.)
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on: November 27, 2012, 09:52:30 PM
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Apparently even people within BFL itself don't keep Josh updated on what's happening. According to Nasser, the chips are not flawed and the delay is being caused by BFL making changes. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. https://forums.butterflylabs.com/bfl-forum-miscellaneous/437-asic-update-26-november-2012-a-4.html#post6311I liked the "chips were flawed" excuse better. It makes a hell of a lot more sense to me than "we decided to add clock buffers". If I were BFL, and I had chips that hashed, I would ship them out the door first thing. Leave the performance optimizations for subsequent generations. I think that's what their customers would prefer. It's not clear to me whether Nasser is talking about revising the ASIC chips themselves, or if he is referring to a board-level change. |
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1573
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Other / Off-topic / Re: Already delays in BFL shipment plans?
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on: November 27, 2012, 09:37:02 PM
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We have people who borrowed in order to place pre-orders whose loans are now falling due.
Well that was dumb. We probably also have people who were counting on income from their ASICs...
And that's just plain stupid. Unless you know what you're getting into, borrowing money to fund a highly risky endeavor is foolhardy. It ought to be obvious, but I'll go go ahead and restate the first rule of investing anyway for everyone here: "Never risk what you cannot afford to lose." |
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1576
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Other / Off-topic / Re: Already delays in BFL shipment plans?
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on: November 27, 2012, 05:17:04 PM
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Maybe they do not have money to refund. Each bug in the ASIC design is extremely expensive and increases the cost of the entire project. The question is whether have they enough money to eliminate bugs and produce working chips?. Time is working against BFL, more and more people will want a refund. Any delay, any setback = less new customers = less supply of money. It threatens bankruptcy. BFL is approaching a critical time. BFL took a big risk by going with a Full Custom design. My ASICs for dummies book says that one drawback of using a Full Custom design is "the odds of screwing something up are much higher". Compounding this is their strategy of doing a full production run of chips with every attempt. The usual strategy is to get the design working first on a shared wafer, and only then move to volume production on full wafers in the next step. |
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1577
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Other / Off-topic / Re: Already delays in BFL shipment plans?
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on: November 27, 2012, 05:09:06 PM
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Well heck, by that criteria BFL is fine, too... since we've always maintained that we would would target October but it would be as late as December (hence the January 1st refund policy, which has been there since day one.)
Thanks for the confirmation that BFL is on target timeframe wise as well, I appreciate it!
Anyone can point me what this Jan 1st refund policy is about ? Please, just fact, like a link.. dont wish to read 12 crappy post to get to the fact.. please. Butterfly Labs, INC. is accepting pre-orders for ASIC based products, expected to begin shipping in late November or early December 2012. Your pre-order with payment confirms your place in line for delivery once we begin shipping. Payments made for pre-orders of ASIC based products now under development should be considered non-refundable until products begin shipping or 1 January 2013, whichever is earlier.
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1580
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Other / Off-topic / Re: Already delays in BFL shipment plans?
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on: November 19, 2012, 09:55:55 PM
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It's really pretty simple to figure this out IMO.
- BFL wanted to fly people to their plant in late october/early november to see their prototypes.
- Their prototype batch of chips didn't work, but they still wanted to show off pics, so they did.
- They ordered up a new batch of chips, this time enough to do a full production run, with fixes in place to correct the issues from the first prototype.
- They delayed the fly-people-to-their-plant thing until they get the new batch of fixed chips in.
- As they are on a second revision of the chip, in all likelihood, it won't have problems. They will time it so that the two peeps flying in will be able to see a working product running on 2nd-revision chips. They will also begin assembly that week, assembling enough units to ship out the first batch (maybe a hundred units or something?).
To me, all the evidence points to them fully expecting working prototypes to be in-hand at the end of October, but then something unexpected came up. I believe that unexpected thing was a bad run of chips, and I believe that's why the only thing they are waiting on for assembly is the new batch of chips.
maybe it's hard to admit they fucked up somewhere down the production pipeline. I think it's been a few weeks now since they were talking up their "bullet run" of chips. I guess even at Bullet Speed these things still take a while. |
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