Swedish ASIC miner company kncminer.com

[madsusies]

The 28mm chips from ORSOC is just a fantasy... a words from guy who work there...

[1715495621]

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[1715495621]

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[ASIC-K]

The 28mm chips from ORSOC is just a fantasy... a words from guy who work there...

ok christina. lol.

[madsusies]

The 28mm chips from ORSOC is just a fantasy... a words from guy who work there...

ok christina. lol.

Lol do u really believe there is some women's don't be an idiot Sir. You got a @ contacts, ask them self, or are you scare?

[ASIC-K]

The 28mm chips from ORSOC is just a fantasy... a words from guy who work there...

ok christina. lol.

Lol do u really believe there is some women's don't be an idiot Sir. You got a @ contacts, ask them self, or are you scare?

i dont even understand what you're saying. www.rosettastone.com

[HyperMega]

$800k for a 28nm full-mask set? This is an amazing offer, at which foundry will I get it that cheap?

Get an itemized quote, do you think you pay the full $2MM up front?  If you do, let me know I will gladly negotiate for you next time for 10%.    that is the payment you will be making PRIOR to your mask.   There are other payments, but you seem to have an inkling of what you are talking about so you know that, don't you?
That I do not believe KnC is producing a fully designed asic should be obvious by now.

That only works if the foundry is convinced that you are worthy of credit. Normally this is not the case for start-ups and SMEs in this price category. For them it is cash in advance or no tape-out. Yes, I know what I'm talking about, it's hard to deal directly with companies like GF or TSMC if your are only a small customer.

I doubt that KnC or OrSOC is seen as a big customer for this project, because they probably will not order more than 50 wafers in the first year (which would be already about 3 PH). 1000 wafers a year would be a big customer. Why should a foundry take any risk for a bitcoin mining ASIC?
So I think they most likely have to pay the complete $1.5M to $2M in advance of the tape-out. And because they said tape-out done "some time ago", they probably paid it also some time ago.

From the commercial point of view I see no reason why KnC should not be able to produce a fully designed 28nm ASIC. They collected enough money by pre-orders to pay the complete 3rd party NREs in advance. But it should be clear, that if they are on track as they claimed, a great deal of the pre-order money isn't in their hands any more.

You are very close to the same point I am making but design is probably 300-400k of the foundry's quote and they say they did all the design themselves (another reason to be skeptical given their foundry did not make them join a shuttle run).    1.  Why go to 28nm as no one will give you space unless they see a long term relationship and believe in your market?  We believe in this market, I am not sure a salesman would want to pitch it with enthusiasm to his boss though.   2.  This company just started doing this 3 months ago.   You really think in three months they are taping out a 28nm?   Add to this, they just raised the money a month ago.  3.  They do background checks before you even get anywhere near this point and 3 months ago, KnC was an idea to "make lots of money".   It does not make sense they have taped at 28nm.
4.   My guess, which people have posted that it is not true, is they are going with eAsic.

Yes, I'm not that far away, but do not agree with all of your points:

1. OrSOC and KnC need a channel partner of one of the two 28nm foundries to get access at all. eASIC would be a choice (also for a standard cell ASIC!), eSilicon or GUC are others. There are many and they love to take your money for that kind of projects. In this way there is no background check by the foundry required.

2. From my own experience I know that not all 28nm "giga" fabs running currently at their capacity limit. If you bring the money (as cash in advance ) through an accepted channel partner they will do a tape-out for you. They will for sure make you not the best price for masks and wafers, but they will do it, just to get workload for their fabs.

3. Physical implementation and sign-off of  a >100mm2 28nm die in about 6 weeks (because mid of June they didn't even have the foundry finally selected and they did tape-out "some time ago") is really a challenge, but not completely impossible. The related risk to fail for such a turbo implementation is huge. I hope they had a really experienced layout team for this job, which already did some tape-outs in the selected 28nm node.

[madsusies]

I'm not 13 you muts trying harder,  you know start with my mom and dad bla bla bla oh sry they are death, kido

[ASIC-K]

I'm not 13 you muts trying harder,  you know start with my mom and dad bla bla bla oh sry they are death, kido

ok. ignored.

[KS]

Could the kids please go and play in the garden, while the adults are trying to have a conversation on topic.

[2112]

All other 28nm (and below) players (like Intel, Samsung, IBM, STM) are so called IDMs, offering their production capacity to some interessting high volume customers from time to time too to get a better workload in their fabs.

At least for STM the above statememnt isn't true. And it wasn't true for almost a year.

Well, since the helveticoin user is tight lipped I had to search the STmicro press releases:

Semiconductor technology leaders ST, Soitec and CMP help universities, research labs and companies prototype next generation of Systems-on-Chip

The CMP multi-project wafer service allows organizations to obtain small quantities--typically from a few dozens to a few thousand units--of advanced ICs. The cost of the 28nm FD-SOI CMOS process has been fixed to 18,000 €/mm2, with a minimum of 1mm2.

http://www.st.com/web/en/press/en/t3343

Silicon-verified process technology delivers 30% higher speed and up to 50% improvement in power

Measurements on a multi-core subsystem in an ST-Ericsson NovaThor ModAp platform, with a maximum frequency exceeding 2.5Ghz and delivering 800 MHz at 0.6V, are confirming expectations and demonstrating the great flexibility of the technology and the extended voltage range exploitable through DVFS (Dynamic Voltage and Frequency Scaling).

http://www.st.com/web/en/press/en/t3370

Pretty soon anyone in EU-landia could probably order this process through Europractice, the same way as bitfury did.

[KS]

$800k for a 28nm full-mask set? This is an amazing offer, at which foundry will I get it that cheap?

Get an itemized quote, do you think you pay the full $2MM up front?  If you do, let me know I will gladly negotiate for you next time for 10%.    that is the payment you will be making PRIOR to your mask.   There are other payments, but you seem to have an inkling of what you are talking about so you know that, don't you?
That I do not believe KnC is producing a fully designed asic should be obvious by now.

That only works if the foundry is convinced that you are worthy of credit. Normally this is not the case for start-ups and SMEs in this price category. For them it is cash in advance or no tape-out. Yes, I know what I'm talking about, it's hard to deal directly with companies like GF or TSMC if your are only a small customer.

I doubt that KnC or OrSOC is seen as a big customer for this project, because they probably will not order more than 50 wafers in the first year (which would be already about 3 PH). 1000 wafers a year would be a big customer. Why should a foundry take any risk for a bitcoin mining ASIC?
So I think they most likely have to pay the complete $1.5M to $2M in advance of the tape-out. And because they said tape-out done "some time ago", they probably paid it also some time ago.

From the commercial point of view I see no reason why KnC should not be able to produce a fully designed 28nm ASIC. They collected enough money by pre-orders to pay the complete 3rd party NREs in advance. But it should be clear, that if they are on track as they claimed, a great deal of the pre-order money isn't in their hands any more.

You are very close to the same point I am making but design is probably 300-400k of the foundry's quote and they say they did all the design themselves (another reason to be skeptical given their foundry did not make them join a shuttle run).    1.  Why go to 28nm as no one will give you space unless they see a long term relationship and believe in your market?  We believe in this market, I am not sure a salesman would want to pitch it with enthusiasm to his boss though.   2.  This company just started doing this 3 months ago.   You really think in three months they are taping out a 28nm?   Add to this, they just raised the money a month ago.  3.  They do background checks before you even get anywhere near this point and 3 months ago, KnC was an idea to "make lots of money".   It does not make sense they have taped at 28nm.
4.   My guess, which people have posted that it is not true, is they are going with eAsic.

Yes, I'm not that far away, but do not agree with all of your points:

1. OrSOC and KnC need a channel partner of one of the two 28nm foundries to get access at all. eASIC would be a choice (also for a standard cell ASIC!), eSilicon or GUC are others. There are many and they love to take your money for that kind of projects. In this way there is no background check by the foundry required.

2. From my own experience I know that not all 28nm "giga" fabs running currently at there capacity limit. If you bring the money (as cash in advance ) through an accepted channel partner they will do a tape-out for you. They will for sure make you not the best price for masks and wafers, but they will do it, just to get workload for their fabs.

3. Physical implementation and sign-off of  a >100mm2 28nm die in about 6 weeks (because mid of June they didn't even have the foundry finally selected and they did tape-out "some time ago") is really a challenge, but not completely impossible. The related risk to fail for such a turbo implementation is huge. I hope they had a really experienced layout team for this job, which already did some tape-out in the concrete 28nm node.

eASIC is GF, Europe.
Altera (my guess) is TSMC, Taiwan, Asia.

ORSoC has a working relationship with both, both do standard cell and take the RTL code. I guess they just had to find the right balance between cost and delivery time. Since Asia won, that very much means they didn't choose eASIC. And they're not dealing with the foundry directly either (hoping they wouldn't take the risk of dealing with a non established partner which would really risk screwing up their timetable).

Also, don't forget they promised a September delivery, NOT a 1st of September delivery. That's 4 weeks to play with.

[ASIC-K]

Also, don't forget they promised a September delivery, NOT a 1st of September delivery. That's 4 weeks to play with.



thank you for bringing this up. so many people cant seem to comprehend this.

[HyperMega]

All other 28nm (and below) players (like Intel, Samsung, IBM, STM) are so called IDMs, offering their production capacity to some interessting high volume customers from time to time too to get a better workload in their fabs.

At least for STM the above statememnt isn't true. And it wasn't true for almost a year.

Well, since the helveticoin user is tight lipped I had to search the STmicro press releases:

Semiconductor technology leaders ST, Soitec and CMP help universities, research labs and companies prototype next generation of Systems-on-Chip

The CMP multi-project wafer service allows organizations to obtain small quantities--typically from a few dozens to a few thousand units--of advanced ICs. The cost of the 28nm FD-SOI CMOS process has been fixed to 18,000 €/mm2, with a minimum of 1mm2.

http://www.st.com/web/en/press/en/t3343

Silicon-verified process technology delivers 30% higher speed and up to 50% improvement in power

Measurements on a multi-core subsystem in an ST-Ericsson NovaThor ModAp platform, with a maximum frequency exceeding 2.5Ghz and delivering 800 MHz at 0.6V, are confirming expectations and demonstrating the great flexibility of the technology and the extended voltage range exploitable through DVFS (Dynamic Voltage and Frequency Scaling).

http://www.st.com/web/en/press/en/t3370

Pretty soon anyone in EU-landia could probably order this process through Europractice, the same way as bitfury did.

CMP offers access to STMs Multi-Project-Wafer runs for SMEs and academia. STM is probably happy about some money coming from this source to finance the MPW mask costs, because they have not enough own content. MPWs are for prototyping runs only. They are not suitable for volume production.

I'm not sure if STM will do a full-mask (not MPW) tape-out for everybody too. For customers ordering 1000 wafers of course, but for one who orders only 50?

Anyway, from the definition STM is an IDM (Integrated Device Manufacturer) not an "pure play" foundry without own chip products. Did you know that STM is a big customer of GF? The FDSOI technology mentioned above will finally also run in Dresden at the GF fab 1 (under STM licence) for volume production.

[HyperMega]

All other 28nm (and below) players (like Intel, Samsung, IBM, STM) are so called IDMs, offering their production capacity to some interessting high volume customers from time to time too to get a better workload in their fabs.

At least for STM the above statememnt isn't true. And it wasn't true for almost a year.

Well, since the helveticoin user is tight lipped I had to search the STmicro press releases:

Semiconductor technology leaders ST, Soitec and CMP help universities, research labs and companies prototype next generation of Systems-on-Chip

The CMP multi-project wafer service allows organizations to obtain small quantities--typically from a few dozens to a few thousand units--of advanced ICs. The cost of the 28nm FD-SOI CMOS process has been fixed to 18,000 €/mm2, with a minimum of 1mm2.

http://www.st.com/web/en/press/en/t3343

Silicon-verified process technology delivers 30% higher speed and up to 50% improvement in power

Measurements on a multi-core subsystem in an ST-Ericsson NovaThor ModAp platform, with a maximum frequency exceeding 2.5Ghz and delivering 800 MHz at 0.6V, are confirming expectations and demonstrating the great flexibility of the technology and the extended voltage range exploitable through DVFS (Dynamic Voltage and Frequency Scaling).

http://www.st.com/web/en/press/en/t3370

Pretty soon anyone in EU-landia could probably order this process through Europractice, the same way as bitfury did.

CMP offers access to STMs Multi-Project-Wafer runs for SMEs and academia (comparable to Europractice). STM is probably happy about some money coming from this source to finance the MPW mask costs, because they have not enough own content. MPWs are for prototyping runs only. They are not suitable for volume production.

I'm not sure if STM will do a full-mask (not MPW) tape-out for everybody too. For customers ordering 1000 wafers of course, but for one who orders only 50?

Anyway, from the definition STM is an IDM (Integrated Device Manufacturer) not an "pure play" foundry without own chip products. Did you know that STM is a big customer of GF? The FDSOI technology mentioned above will finally also run in Dresden at the GF fab 1 (under STM licence) for volume production.

[minternj]

Isn't bitfury's foundry UMC?

[HyperMega]

$800k for a 28nm full-mask set? This is an amazing offer, at which foundry will I get it that cheap?

Get an itemized quote, do you think you pay the full $2MM up front?  If you do, let me know I will gladly negotiate for you next time for 10%.    that is the payment you will be making PRIOR to your mask.   There are other payments, but you seem to have an inkling of what you are talking about so you know that, don't you?
That I do not believe KnC is producing a fully designed asic should be obvious by now.

That only works if the foundry is convinced that you are worthy of credit. Normally this is not the case for start-ups and SMEs in this price category. For them it is cash in advance or no tape-out. Yes, I know what I'm talking about, it's hard to deal directly with companies like GF or TSMC if your are only a small customer.

I doubt that KnC or OrSOC is seen as a big customer for this project, because they probably will not order more than 50 wafers in the first year (which would be already about 3 PH). 1000 wafers a year would be a big customer. Why should a foundry take any risk for a bitcoin mining ASIC?
So I think they most likely have to pay the complete $1.5M to $2M in advance of the tape-out. And because they said tape-out done "some time ago", they probably paid it also some time ago.

From the commercial point of view I see no reason why KnC should not be able to produce a fully designed 28nm ASIC. They collected enough money by pre-orders to pay the complete 3rd party NREs in advance. But it should be clear, that if they are on track as they claimed, a great deal of the pre-order money isn't in their hands any more.

You are very close to the same point I am making but design is probably 300-400k of the foundry's quote and they say they did all the design themselves (another reason to be skeptical given their foundry did not make them join a shuttle run).    1.  Why go to 28nm as no one will give you space unless they see a long term relationship and believe in your market?  We believe in this market, I am not sure a salesman would want to pitch it with enthusiasm to his boss though.   2.  This company just started doing this 3 months ago.   You really think in three months they are taping out a 28nm?   Add to this, they just raised the money a month ago.  3.  They do background checks before you even get anywhere near this point and 3 months ago, KnC was an idea to "make lots of money".   It does not make sense they have taped at 28nm.
4.   My guess, which people have posted that it is not true, is they are going with eAsic.

Yes, I'm not that far away, but do not agree with all of your points:

1. OrSOC and KnC need a channel partner of one of the two 28nm foundries to get access at all. eASIC would be a choice (also for a standard cell ASIC!), eSilicon or GUC are others. There are many and they love to take your money for that kind of projects. In this way there is no background check by the foundry required.

2. From my own experience I know that not all 28nm "giga" fabs running currently at there capacity limit. If you bring the money (as cash in advance ) through an accepted channel partner they will do a tape-out for you. They will for sure make you not the best price for masks and wafers, but they will do it, just to get workload for their fabs.

3. Physical implementation and sign-off of  a >100mm2 28nm die in about 6 weeks (because mid of June they didn't even have the foundry finally selected and they did tape-out "some time ago") is really a challenge, but not completely impossible. The related risk to fail for such a turbo implementation is huge. I hope they had a really experienced layout team for this job, which already did some tape-out in the concrete 28nm node.

eASIC is GF, Europe.
Altera (my guess) is TSMC, Taiwan, Asia.

ORSoC has a working relationship with both, both do standard cell and take the RTL code. I guess they just had to find the right balance between cost and delivery time. Since Asia won, that very much means they didn't choose eASIC. And they're not dealing with the foundry directly either (hoping they wouldn't take the risk of dealing with a non established partner which would really risk screwing up their timetable).

Also, don't forget they promised a September delivery, NOT a 1st of September delivery. That's 4 weeks to play with.

As far as I know, Altera offers FPGA-Hardcopy only. KnC said several times that they are doing definitely a standard cell ASIC design, no FPGA-Hardcopy.
Their released R&D slides are looking as a typical standard cell ASIC too.
So it's for sure not Altera and hopefully not eASIC, because they have no proven 28nm experience so far. I guess there is a new partner.

Their ambitious delivery dates I rather do not comment.

[HyperMega]

Isn't bitfury's foundry UMC?

Could be, Europractice offers access to UMC, TSMC and some others. But the smallest features size avaiable through this channel are currently 40nm.

[Bitcoinorama]

Isn't bitfury's foundry UMC?

Could be, Europractice offers access to UMC, TSMC and some others. But the smallest features size avaiable through this channel are currently 40nm.

Which makes sense as Bitfury is 55nm.

[Ytterbium]

...BFL who ordered their casing before refining their design got lumbered with a crapload of Jalepeno cases that didn't fit. Has Bitfury showed casing? If your not comfortable with what your investing in and the design team behind it, walk away.

definitely, they have at least pictures of all components.

https://bitcointalk.org/index.php?topic=251966.0

Uh... there's no case on that thing.  It's just a bunch of chips and PCBs sitting on a cardboard box

Well fab will be in People's Rep. of China obv., same as all Bitcoin ASIC vendors, either at Global Foundries, or TSMC, assembly will be Sweden.

I'm pretty sure that TAIWAN Semiconductor Manufacturing is in Taiwan, A.K.A. the Republic of China, as opposed to the People's republic of China.

Taiwanese tend to be quite picky on that point.

Which only shows you haven't read up on anything. There is nothing to show. They aim to have chips in hand by September, that's all they've ever promised. See they could show you other components, but with the earlier similie I gave with respect to this being a formulae one race; McLaren aren't about to show Ferrari their upcoming seasons blueprints for their car, or for that matter reveal anything about it until the press release before the race starts. Fact is they have been spending pre-order money and are committed.

That's my reasoning, but you need to find your own.

Well, they said they'd ship the first two days worth of orders in September, and the rest so far in October.  That means, obviously they'll need to not only have the chips, but also the PCBs, cases, and assembly factory all set up and ready to go in the next 60 days.

I don't really think showing cases/PCBs. would be that big of a deal.   Remember, BFL has had their chips on hand for months, and they got strung up on the simple logistics of getting them all in cases and mailed out.

Same thing with Avalon - even when they had their chips, they still got hung up on the logistics of sending out just a few hundred units at a time.

It's not at all unreasonable to worry that a company that's never had to package and ship a consumer product might run into hiccups, even if they have their chips.

[minternj]

Isn't bitfury's foundry UMC?

Could be, Europractice offers access to UMC, TSMC and some others. But the smallest features size avaiable through this channel are currently 40nm.

Oh ok, was wondering since ive seen bitfury say that. Wasnt sure of the tie in with europractice.

[2112]

CMP offers access to STMs Multi-Project-Wafer runs for SMEs and academia. STM is probably happy about some money coming from this source to finance the MPW mask costs, because they have not enough own content. MPWs are for prototyping runs only. They are not suitable for volume production.

I'm not sure if STM will do a full-mask (not MPW) tape-out for everybody too. For customers ordering 1000 wafers of course, but for one who orders only 50?

Anyway, from the definition STM is an IDM (Integrated Device Manufacturer) not an "pure play" foundry without own chip products. Did you know that STM is a big customer of GF? The FDSOI technology mentioned above will finally also run in Dresden at the GF fab 1 (under STM licence) for volume production.

STM is apparently making them in Crolles, France; not in any facility that you've enumerated.

Following the Company’s December announcement of the successful manufacturing of System on Chip (SoC) integrated circuits, ST today announced that application-processor engine devices manufactured at the Company’s Crolles, France fab, were capable of operating at 3GHz with even greater power efficiency at a given operating frequency than alternate technologies.

http://www.st.com/web/en/press/en/t3405

Who cares about "volume" production in the way "volume" is used in the semiconductor industry. KnC isn't and isn't going to reach that size of the orders. "pure play" vs. IDM distinction also doesn't really matter. What does matter is that the list of fabs capable of making KnC chips is much longer that you've proposed. Because the Bitcoin miner is essentially free from intelectual property encumberances it is also free from many other manufacturing constraints typical in the industry.